74FCT810BTSOG datasheet, PDF - EEWORLD Datasheet

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74FCT810BTSOG: DescriptionSOIC-20, Tube; Categorylogic logic; File Size63KB，6 Pages; ManufacturerIDT (Integrated Device Technology); Environmental Compliance

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74FCT810BTSOG Overview

SOIC-20, Tube

74FCT810BTSOG Parametric

Parameter Name	Attribute value
Brand Name	Integrated Device Technology
Is it lead-free?	Lead free
Is it Rohs certified?	conform to
Maker	IDT (Integrated Device Technology)
Parts packaging code	SOIC
package instruction	GREEN, SOIC-20
Contacts	20
Manufacturer packaging code	PSG20
Reach Compliance Code	unknown
ECCN code	EAR99
Other features	ONE BANK WITH ALL TRUE OUTPUTS & OTHER WITH ALL INVERTED OUTPUTS
series	FCT
Input adjustment	SCHMITT TRIGGER
JESD-30 code	R-PDSO-G20
JESD-609 code	e3
Logic integrated circuit type	LOW SKEW CLOCK DRIVER
Humidity sensitivity level	1
Number of functions	2
Number of inverted outputs	5
Number of terminals	20
Actual output times	5
Maximum operating temperature	70 °C
Minimum operating temperature
Output characteristics	3-STATE
Package body material	PLASTIC/EPOXY
encapsulated code	SOP
Package shape	RECTANGULAR
Package form	SMALL OUTLINE
Peak Reflow Temperature (Celsius)	260
propagation delay (tpd)	4.3 ns
Certification status	Not Qualified
Same Edge Skew-Max（tskwd）	0.6 ns
Maximum supply voltage (Vsup)	5.25 V
Minimum supply voltage (Vsup)	4.75 V
Nominal supply voltage (Vsup)	5 V
surface mount	YES
technology	CMOS
Temperature level	COMMERCIAL
Terminal surface	Matte Tin (Sn)
Terminal form	GULL WING
Terminal location	DUAL
Maximum time at peak reflow temperature	NOT SPECIFIED

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IDT74FCT810BT/CT

FAST CMOS BUFFER/CLOCK DRIVER

COMMERCIAL TEMPERATURE RANGE

FAST CMOS

BUFFER/CLOCK DRIVER

IDT74FCT810BT/CT

FEATURES:

•

0.5 MICRON CMOS Technology

Guaranteed low skew < 600ps (max.)

Very low duty cycle distortion < 700ps (max.)

Low CMOS levels

TTL compatible inputs and outputs

TTL level output voltage swings

High drive: -32mA I

, +48mA I

Two independent output banks with 3-state control:

– One 1:5 inverting bank

– One 1:5 non-inverting bank

• Available in QSOP, SSOP, and SOIC packages

DESCRIPTION:

The 74FCT810T is a dual bank inverting/ non-inverting clock driver

built using advanced dual metal CMOS technology. It consists of two banks

of drivers, one inverting and one non-inverting. Each bank drives five output

buffers from a standard TTL-compatible input. The FCT810T has low output

skew, pulse skew and package skew. Inputs are designed with hysteresis

circuitry for improved noise immunity. The outputs are designed with TTL

output levels and controlled edge rates to reduce signal noise. The part has

multiple grounds, minimizing the effects of ground inductance.

FUNCTIONAL BLOCK DIAGRAM

PIN CONFIGURATION

GND

-O A

GND

O B

-O B

GND

QSOP/ SOIC/ SSOP

TOP VIEW

COMMERCIAL TEMPERATURE RANGE

2001

Integrated Device Technology, Inc.

The IDT logo is a registered trademark of Integrated Device Technology, Inc.

MAY 2010

DSC-4646/3

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