DF
N1
PMDXB550UNE
25 March 2015
01
0B
-6
30 V, dual N-channel Trench MOSFET
Product data sheet
1. General description
Dual N-channel enhancement mode Field-Effect Transistor (FET) in a leadless ultra small
DFN1010B-6 (SOT1216) Surface-Mounted Device (SMD) plastic package using Trench
MOSFET technology.
2. Features and benefits
•
•
•
•
•
Low threshold voltage
Leadless ultra small and ultra thin SMD plastic package: 1.1 × 1.0 × 0.37 mm
Trench MOSFET technology
ElectroStatic Discharge (ESD) protection > 2 kV HBM
Exposed drain pad for excellent thermal conduction
3. Applications
•
•
•
•
Relay driver
High-speed line driver
Low-side load switch
Switching circuits
4. Quick reference data
Table 1.
Symbol
Per transistor
V
DS
V
GS
I
D
R
DSon
drain-source voltage
gate-source voltage
drain current
V
GS
= 4.5 V; T
amb
= 25 °C
V
GS
= 4.5 V; I
D
= 590 mA; T
j
= 25 °C
[1]
Quick reference data
Parameter
Conditions
T
j
= 25 °C
Min
-
-8
-
Typ
-
-
-
Max
30
8
590
Unit
V
V
mA
Static characteristics (per transistor)
drain-source on-state
resistance
[1]
2
-
550
670
mΩ
Device mounted on an FR4 Printed-Circuit Board (PCB), single-sided copper, tin-plated, mounting pad for
drain 1 cm .
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NXP Semiconductors
PMDXB550UNE
30 V, dual N-channel Trench MOSFET
5. Pinning information
Table 2.
Pin
1
2
3
4
5
6
7
8
Pinning information
Symbol Description
S1
G1
D2
S2
G2
D1
D1
D2
source TR1
gate TR1
drain TR2
source TR2
gate TR2
drain TR1
drain TR1
drain TR2
1
2
3
8
7
6
5
4
S1
S2
017aaa256
Simplified outline
Graphic symbol
D1
D2
G1
G2
Transparent top view
DFN1010B-6 (SOT1216)
6. Ordering information
Table 3.
Ordering information
Package
Name
PMDXB550UNE
DFN1010B-6
Description
DFN1010B-6: plastic thermal enhanced ultra thin small outline
package; no leads; 6 terminals
Version
SOT1216
Type number
7. Marking
Table 4.
Marking codes
Marking code
01 10 00
READING
DIRECTION
Type number
PMDXB550UNE
MARKING CODE
(EXAMPLE)
MARK-FREE AREA
PIN 1
INDICATION MARK
READING EXAMPLE:
11
01
10
YEAR DATE
CODE
aaa-007665
Fig. 1.
PMDXB550UNE
DFN1010B-6 (SOT1216) binary marking code description
All information provided in this document is subject to legal disclaimers.
© NXP Semiconductors N.V. 2015. All rights reserved
Product data sheet
25 March 2015
2 / 15
NXP Semiconductors
PMDXB550UNE
30 V, dual N-channel Trench MOSFET
8. Limiting values
Table 5.
Limiting values
In accordance with the Absolute Maximum Rating System (IEC 60134).
Symbol
Per transistor
V
DS
V
GS
I
D
drain-source voltage
gate-source voltage
drain current
V
GS
= 4.5 V; T
amb
= 25 °C
V
GS
= 4.5 V; T
amb
= 100 °C
I
DM
P
tot
peak drain current
total power dissipation
T
amb
= 25 °C; single pulse; t
p
≤ 10 µs
T
amb
= 25 °C
T
sp
= 25 °C
Source-drain diode
I
S
Per device
T
j
T
amb
T
stg
junction temperature
ambient temperature
storage temperature
[1]
[2]
[2]
[1]
[1]
[1]
Parameter
Conditions
T
j
= 25 °C
Min
-
-8
-
-
-
-
-
-
Max
30
8
590
370
2.3
285
410
4030
Unit
V
V
mA
mA
A
mW
mW
mW
source current
T
amb
= 25 °C
-
380
mA
-55
-55
-65
150
150
150
°C
°C
°C
Device mounted on an FR4 Printed-Circuit Board (PCB), single-sided copper, tin-plated, mounting pad for
drain 1 cm .
Device mounted on an FR4 Printed-Circuit Board (PCB), single-sided copper, tin-plated and standard
footprint.
2
PMDXB550UNE
All information provided in this document is subject to legal disclaimers.
© NXP Semiconductors N.V. 2015. All rights reserved
Product data sheet
25 March 2015
3 / 15
NXP Semiconductors
PMDXB550UNE
30 V, dual N-channel Trench MOSFET
120
P
der
(%)
80
017aaa123
120
I
der
(%)
80
017aaa124
40
40
0
- 75
- 25
25
75
125
T
j
(°C)
175
0
- 75
- 25
25
75
125
T
j
(°C)
175
Fig. 2.
Normalized total power dissipation as a
function of junction temperature
Fig. 3.
Normalized continuous drain current as a
function of junction temperature
10
I
D
(A)
1
100 µs
10
-1
1 ms
DC; T
sp
= 25 °C
10 ms
100 ms
t
p
= 10 µs
aaa-017279
Limit R
DSon
= V
DS
/I
D
10
-2
DC; T
amb
= 25 °C;
drain mounting pad 1 cm
2
10
-3
10
-1
1
10
V
DS
(V)
10
2
Fig. 4.
Safe operating area; junction to ambient; continuous and peak drain currents as a function of drain-
source voltage
9. Thermal characteristics
Table 6.
Symbol
Per transistor
R
th(j-a)
thermal resistance
from junction to
ambient
in free air
[1]
[2]
Thermal characteristics
Parameter
Conditions
Min
-
-
Typ
380
275
Max
440
305
Unit
K/W
K/W
PMDXB550UNE
All information provided in this document is subject to legal disclaimers.
© NXP Semiconductors N.V. 2015. All rights reserved
Product data sheet
25 March 2015
4 / 15
NXP Semiconductors
PMDXB550UNE
30 V, dual N-channel Trench MOSFET
Symbol
R
th(j-sp)
Parameter
thermal resistance
from junction to solder
point
[1]
[2]
Conditions
Min
-
Typ
27
Max
31
Unit
K/W
Device mounted on an FR4 PCB, single-sided copper, tin-plated and standard footprint.
Device mounted on an FR4 PCB, single-sided copper, tin-plated, mounting pad for drain 1 cm .
aaa-015677
2
10
3
Z
th(j-a)
(K/W)
duty cycle = 1
0.75
0.50
0.33
10
2
0.25
0.10
0.20
0.05
0.01
0.02
0
10
10
-3
10
-2
10
-1
1
10
10
2
t
p
(s)
10
3
FR4 PCB, standard footprint
Fig. 5.
Transient thermal impedance from junction to ambient as a function of pulse duration; typical values
10
3
aaa-015678
Z
th(j-a)
(K/W)
duty cycle = 1
0.75
0.50
0.25
0.10
10
2
0.33
0.20
0.05
0.01
0.02
0
10
10
-3
10
-2
10
-1
2
1
10
10
2
t
p
(s)
10
3
FR4 PCB, mounting pad for drain 1 cm
Fig. 6.
Transient thermal impedance from junction to ambient as a function of pulse duration; typical values
PMDXB550UNE
All information provided in this document is subject to legal disclaimers.
© NXP Semiconductors N.V. 2015. All rights reserved
Product data sheet
25 March 2015
5 / 15
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