UPSD3235A-40U1T datasheet, PDF

Datasheet> All Categories > semiconductor> The embedded processor and controller> UPSD3235A-40U1T

UPSD3235A-40U1T: Description8-BIT, FLASH, 24 MHz, MICROCONTROLLER, PQFP80; Categorysemiconductor The embedded processor and controller; File Size1MB，189 Pages; ManufacturerSTMicroelectronics; Websitehttp://www.st.com/

Download Datasheet Parametric View All

UPSD3235A-40U1T Overview

8-BIT, FLASH, 24 MHz, MICROCONTROLLER, PQFP80

UPSD3235A-40U1T Parametric

Parameter Name	Attribute value
Number of functions	1
Number of terminals	80
Maximum operating temperature	85 Cel
Minimum operating temperature	-40 Cel
Maximum supply/operating voltage	3.6 V
Minimum supply/operating voltage	3 V
Rated supply voltage	3.3 V
External data bus width	8
Number of input and output buses	63
Line speed	24 MHz
Processing package description	ROHS COMPLIANT, plastic, TQFP-80
Lead-free	Yes
EU RoHS regulations	Yes
state	DISCONTINUED
packaging shape	SQUARE
Package Size	FLATPACK, LOW PROFILE, FINE PITCH
surface mount	Yes
Terminal form	GULL WING
Terminal spacing	0.5000 mm
terminal coating	MATTE Tin
Terminal location	Four
Packaging Materials	Plastic/Epoxy
Temperature level	INDUSTRIAL
ADC channel	Yes
Address bus width	12
Number of digits	8
Maximum FCLK clock frequency	40 MHz
Microprocessor type	Microcontroller
PWM channel	Yes
ROM programming	FLASH

Preview

Download Datasheet

View All

UPSD3234A, UPSD3234BV

UPSD3233B, UPSD3233BV

Flash programmable system devices

with 8032 MCU and 64 Kbit SRAM

Features

■

Fast 8-bit 8032 MCU

– 40 MHz at 5.0 V, 24 MHz at 3.3 V

– Core, 12-clocks per instruction

Dual Flash memories with memory

management

– Place either memory into 8032 program

address space or data address space

– Read-while-write operation for in-

application programming and EEPROM

emulation

– Single voltage program and erase

– 100,000 minimum erase cycles, 15-year

retention

Clock, reset, and supply management

– Normal, idle, and power down modes

– Power-on and low voltage reset supervisor

– Programmable watchdog timer

Programmable logic, general-purpose

– 16 macrocells

– Implements state machines, glue-logic, etc.

Timers and interrupts

– Three 8032 standard 16-bit timers

– 10 Interrupt sources with two external

interrupt pins

■

LQFP52 (T)

52-lead, thin,

quad flat package

■

LQFP80 (U)

80-lead, thin, quad

flat package

A/D converter

– Four channels, 8-bit resolution, 10 µs

Communication interfaces

– USB v1.1, low-speed 1.5 Mbps,

3 endpoints

– I

C master/slave bus controller

– Two UARTs with independent baud rate

– Six I/O ports with up to 46 I/O pins

– 8032 address/data bus available on

TQFP80 package

– 5 PWM outputs, 8-bit resolution

JTAG in-system programming

– Program the entire device in as little as

10 seconds

Single supply voltage

– 4.5 to 5.5 V

– 3.0 to 3.6 V

ECOPACK® packages

■

Table 1.

Device summary

Max. clock 1st

2nd

8032

SRAM GPIO USB

(V)

(MHz)

Flash Flash

bus

128 KB 32 KB

256 KB 32 KB

8 KB

Yes

Pkg.

Temp.

Order code

UPSD3233B-40T6

UPSD3233BV-24T6

UPSD3233B-40U6

UPSD3233BV-24U6

UPSD3234A-40T6

UPSD3234A-40U6

UPSD3234BV-24U6

4.5-5.5 TQFP52 –40°C to 85°C

3.0-3.6 TQFP52 –40°C to 85°C

4.5-5.5 TQFP80 –40°C to 85°C

3.0-3.6 TQFP80 –40°C to 85°C

4.5-5.5 TQFP52 –40°C to 85°C

4.5-5.5 TQFP80 –40°C to 85°C

3.0-3.6 TQFP80 –40°C to 85°C

January 2009

Rev 5

1/189

www.st.com

Contents

UPSD3234A, UPSD3234BV, UPSD3233B, UPSD3233BV

Contents

UPSD323xx description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9

1.1

52-pin package I/O port . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15

Architecture overview . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16

2.1

2.2

Memory organization . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16

Registers . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16

2.2.1

2.2.2

2.2.3

2.2.4

2.2.5

2.2.6

2.2.7

Accumulator . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17

B register . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17

Stack pointer . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17

Program counter . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18

Program status word . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18

Registers R0~R7 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18

Data pointer register . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18

2.3

2.4

2.5

2.6

2.7

2.8

2.9

Program memory . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19

Data memory . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19

RAM . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19

XRAM-DDC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20

XRAM-PSD . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20

SFR . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20

Addressing modes . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21

2.9.1

2.9.2

2.9.3

2.9.4

2.9.5

2.9.6

Direct addressing . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21

Indirect addressing . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22

Immediate constants addressing . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22

Indexed addressing . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22

2.10

2.11

2.12

Arithmetic instructions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23

Logical instructions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24

Data transfers . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25

2.12.1

2.12.2

2.12.3

Internal RAM . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25

External RAM . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 28

Lookup tables . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 28

2.13

2/189

Boolean instructions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 29

UPSD3234A, UPSD3234BV, UPSD3233B, UPSD3233BV

Contents

2.14

2.15

2.16

Relative offset . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 30

Jump instructions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 30

Machine cycles . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 33

UPSD323xx hardware description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 35

MCU module description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 36

4.1

Special function registers . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 36

Interrupt system . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 43

5.1

5.2

5.3

5.4

5.5

5.6

5.7

5.8

5.9

5.10

5.11

External Int0 interrupt . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 43

Timer 0 and 1 interrupts . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 43

Timer 2 interrupt . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 43

C interrupt . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 43

External Int1 interrupt . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 44

DDC interrupt . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 44

USB interrupt . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 44

USART interrupt . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 44

Interrupt priority structure . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 45

Interrupt enable structure . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 46

How interrupts are handled . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 48

Power-saving mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 49

6.1

6.2

6.3

6.4

6.5

Idle mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 49

Power-down mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 49

Power control register . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 49

Idle mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 50

Power-down mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 50

I/O ports (MCU module) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 51

7.1

Port type and description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 52

Oscillator . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 54

Supervisory . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 55

3/189

Contents

UPSD3234A, UPSD3234BV, UPSD3233B, UPSD3233BV

9.1

9.2

9.3

9.4

External reset . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 55

Low V

voltage reset . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 55

Watchdog timer overflow . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 56

USB reset . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 56

Watchdog timer . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 57

Timer/counters (Timer 0, Timer 1 and Timer 2) . . . . . . . . . . . . . . . . . . 59

11.1

Timer 0 and Timer 1 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 59

11.1.1

11.1.2

11.1.3

11.1.4

Mode 0 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 60

Mode 1 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 60

Mode 2 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 61

Mode 3 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 62

11.2

Timer 2 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 62

Standard serial interface (UART) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 66

12.1

12.2

Multiprocessor communications . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 66

Serial port control register . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 67

12.2.1

12.2.2

12.2.3

12.2.4

12.2.5

12.2.6

Baud rates . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 68

Using Timer 1 to generate baud rates . . . . . . . . . . . . . . . . . . . . . . . . . . 68

Using Timer/counter 2 to generate baud rates . . . . . . . . . . . . . . . . . . . 68

More about Mode 0 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 69

More about Mode 1 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 70

More about Modes 2 and 3 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 71

Analog-to-digital convertor (ADC) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 77

13.1

ADC interrupt . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 77

Pulse width modulation (PWM) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 80

14.1

14.2

14.3

4-channel PWM unit (PWM 0-3) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 80

Programmable period 8-bit PWM . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 82

PWM 4-channel operation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 83

C interface . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 84

15.1

15.2

Serial status register (SxSTA: S1STA, S2STA) . . . . . . . . . . . . . . . . . . . . 86

Data shift register (SxDAT: S1DAT, S2DAT) . . . . . . . . . . . . . . . . . . . . . . . 86

4/189

UPSD3234A, UPSD3234BV, UPSD3233B, UPSD3233BV

Contents

15.3

Address register (SxADR: S1ADR, S2ADR) . . . . . . . . . . . . . . . . . . . . . . 87

DDC interface . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 89

16.1

Special Function register for the DDC interface . . . . . . . . . . . . . . . . . . . . 89

16.1.1

16.1.2

DDCDAT register . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 90

DDCADR register . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 90

16.2

16.3

16.4

Host type detection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 92

DDC1 protocol . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 92

DDC2B protocol . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 94

USB hardware . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 95

17.1

17.2

USB related registers . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 95

Transceiver . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 101

17.2.1

17.2.2

USB physical layer characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . 101

Low speed driver characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 102

17.3

17.4

Receiver characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 102

External USB pull-up resistor . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 103

PSD module . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 106

18.1

18.2

Functional overview . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 106

In-system programming (ISP) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 107

Development system . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 109

PSD module register description and address offset . . . . . . . . . . . . 110

PSD module detailed operation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 111

Memory blocks . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 112

22.1

22.2

Primary Flash memory and secondary Flash memory description . . . . 112

Memory block select signals . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 112

22.2.1

22.2.2

Ready/Busy (PC3) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 112

Memory operation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 112

22.3

22.4

Instructions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 113

Power-down instruction and Power-up mode . . . . . . . . . . . . . . . . . . . . . 115

22.4.1

Power-up mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 115

5/189

Recommended Resources

Power supply circuit with multiple outputs (MAX1902)

STK0030 audio IC circuit diagram

Switching regulator composed of TL431

Field of view interference detector alarm circuit diagram

Practical soft start circuit diagram in switching power supply a

Protection circuit for detecting high-frequency AC current short circuits

[OpenCV Getting Started Tutorial 5] Separating Color Channels & Multi-channel Image Mixing: [i=s]This post was last edited by Rambo on 2017-12-19 17:22[/i] [align=left][color=#555555][font="][size=15px]In the previous article, we talked about using the addWeighted function to perform image b...; 兰博 Embedded System

DAQ Basics Technical Documentation: DAQ Basics Technical Documentation...; 安_然 Test/Measurement

Take a different route to work: Every morning, I queue up for the subway to go to work. There are many people at Shahe Station, and the queue time is about 20 minutes. After entering the station, there are basically few people going...; lcofjp Talking

CC2630 TIMAC protocol stack low power consumption issue: Project function: Collect 5s data and send it - sleep for 5s - collect 5s data and send it, repeat this cycle Platform: CC2630 Protocol stack: timac_1_05_02_43299Problem description: During the 5s sle...; fish001 Wireless Connectivity

LM3S8962 Download Problem: The problem encountered when downloading the program using an external download line is as shown below:No response for a long time, what's the problem? Please give me some advice!...; eeleader Microcontroller MCU

May I ask which company's product SPC2811A is? I couldn't find it when I searched online?: As the title says, thank you very much! May I ask which company's product SPC2811A is? I couldn't find it online....; eedede Embedded System

Shortcut: S0 S1 S2 S3 S4 S5 S6 S7 S8 S9 SA SB SC SD SE SF SG SH SI SJ SK SL SM SN SO SP SQ SR SS ST SU SV SW SX SY SZ T0 T1 T2 T3 T4 T5 T6 T7 T8 T9 TA TB TC TD TE TF TG TH TI TJ TK TL TM TN TO TP TQ TR TS TT TU TV TW TX TY TZ U0 U1 U2 U3 U4 U6 U7 U8 UA UB UC UD UE UF UG UH UI UJ UK UL UM UN UP UQ UR US UT UU UV UW UX UZ V0 V1 V2 V3 V4 V5 V6 V7 V8 V9 VA VB VC VD VE VF VG VH VI VJ VK VL VM VN VO VP VQ VR VS VT VU VV VW VX VY VZ W0 W1 W2 W3 W4 W5 W6 W7 W8 W9 WA WB WC WD WE WF WG WH WI WJ WK WL WM WN WO WP WR WS WT WU WV WW WY X0 X1 X2 X3 X4 X5 X7 X8 X9 XA XB XC XD XE XF XG XH XK XL XM XN XO XP XQ XR XS XT XU XV XW XX XY XZ Y0 Y1 Y2 Y4 Y5 Y6 Y9 YA YB YC YD YE YF YG YH YK YL YM YN YP YQ YR YS YT YX Z0 Z1 Z2 Z3 Z4 Z5 Z6 Z8 ZA ZB ZC ZD ZE ZF ZG ZH ZJ ZL ZM ZN ZP ZR ZS ZT ZU ZV ZW ZX ZY

Popular Components