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TO
-22
0A
B
BUK9505-30A
N-channel TrenchMOS logic level FET
Rev. 3 — 20 April 2011
Product data sheet
1. Product profile
1.1 General description
Logic level N-channel enhancement mode Field-Effect Transistor (FET) in a plastic
package using TrenchMOS technology. This product has been designed and qualified to
the appropriate AEC standard for use in automotive critical applications.
1.2 Features and benefits
AEC Q101 compliant
Low conduction losses due to low
on-state resistance
1.3 Applications
Automotive and general purpose
power switching
1.4 Quick reference data
Table 1.
Symbol
V
DS
I
D
P
tot
R
DSon
Quick reference data
Parameter
drain-source voltage
drain current
total power dissipation
drain-source on-state
resistance
V
GS
= 5 V; I
D
= 25 A;
T
j
= 25 °C
V
GS
= 10 V; I
D
= 25 A;
T
j
= 25 °C
Avalanche ruggedness
E
DS(AL)S
non-repetitive
I
D
= 75 A; V
sup
≤
25 V;
drain-source avalanche R
GS
= 50
Ω;
V
GS
= 5 V;
T
j(init)
= 25 °C; unclamped
energy
-
-
500
mJ
Conditions
T
j
≥
25 °C; T
j
≤
175 °C
T
mb
= 25 °C
Min
-
-
-
-
-
Typ
-
-
-
4.3
3.9
Max Unit
30
75
230
5
4.6
V
A
W
mΩ
mΩ
Static characteristics
NXP Semiconductors
BUK9505-30A
N-channel TrenchMOS logic level FET
2. Pinning information
Table 2.
Pin
1
2
3
mb
Pinning information
Symbol Description
G
D
S
D
gate
drain
source
mounting base;
connected to drain
mb
D
Simplified outline
Graphic symbol
G
mbb076
S
1 2 3
SOT78A (TO-220AB)
3. Ordering information
Table 3.
Ordering information
Package
Name
BUK9505-30A
TO-220AB
Description
plastic single-ended package; heatsink mounted;
1 mounting hole; 3-lead TO-220AB
Version
SOT78A
Type number
4. Limiting values
Table 4.
Symbol
V
DS
V
DGR
V
GS
I
D
I
DM
P
tot
T
stg
T
j
V
GSM
I
S
I
SM
E
DS(AL)S
Limiting values
Parameter
drain-source voltage
drain-gate voltage
gate-source voltage
drain current
peak drain current
total power dissipation
storage temperature
junction temperature
peak gate-source voltage
source current
peak source current
non-repetitive drain-source
avalanche energy
pulsed; t
p
≤
50 µs
T
mb
= 25 °C
pulsed; T
mb
= 25 °C
I
D
= 75 A; V
sup
≤
25 V; R
GS
= 50
Ω;
V
GS
= 5 V; T
j(init)
= 25 °C; unclamped
T
mb
= 25 °C
T
mb
= 100 °C
T
mb
= 25 °C; pulsed
T
mb
= 25 °C
Conditions
T
j
≥
25 °C; T
j
≤
175 °C
R
GS
= 20 kΩ
Min
-
-
-10
-
-
-
-
-55
-55
-15
-
-
-
Max
30
30
10
75
75
400
230
175
175
15
75
240
500
Unit
V
V
V
A
A
A
W
°C
°C
V
A
A
mJ
In accordance with the Absolute Maximum Rating System (IEC 60134).
Source-drain diode
Avalanche ruggedness
BUK9505-30A
All information provided in this document is subject to legal disclaimers.
© NXP B.V. 2011. All rights reserved.
Product data sheet
Rev. 3 — 20 April 2011
2 of 13
NXP Semiconductors
BUK9505-30A
N-channel TrenchMOS logic level FET
100
P
der
(%)
80
003aag035
100
I
D
(%)
80
003aag036
60
60
40
40
20
20
0
0
40
80
120
160
200
T
mb
(°C)
0
0
40
80
120
160
200
T
mb
(°C)
V
GS
≥
5 V
Fig 1.
Normalized total power dissipation as a
function of mounting base temperature
003aag037
Fig 2.
Normalized continuous drain current as a
function of mounting base temperature
003aag050
10
3
I
DM
(A)
10
2
R
DS(on)
= V
DS
/ I
D
120
WDSS
(%)
100
80
60
40
20
t
p
= 100 μs
1 ms
D.C.
10 ms
100 ms
10
1
1
10
V
DS
(V)
10
2
0
20
60
100
140
T
mb
(°C)
180
T
mb
= 25 °C; I
DM
is single pulse
Fig 3.
Safe operating area; continuous and peak drain
currents as a function of drain-source voltage
Fig 4.
I
D
= 75 A
Normalised drain-source non-repetitive
avalanche energy as a function of
mounting-base temperature
BUK9505-30A
All information provided in this document is subject to legal disclaimers.
© NXP B.V. 2011. All rights reserved.
Product data sheet
Rev. 3 — 20 April 2011
3 of 13
NXP Semiconductors
BUK9505-30A
N-channel TrenchMOS logic level FET
5. Thermal characteristics
Table 5.
Symbol
R
th(j-mb)
R
th(j-a)
Thermal characteristics
Parameter
thermal resistance from
junction to mounting base
thermal resistance from
junction to ambient
vertical in still air; in free air
Conditions
Min
-
-
Typ
-
60
Max
0.65
-
Unit
K/W
K/W
1
Z
th(j-mb)
δ = 0.5
(K/W)
0.2
-1
10
0.1
0.05
0.02
10
-2
0
t
p
P
003aag038
δ=
t
p
T
t
T
10
-3
10
-6
10
-5
10
-4
10
-3
10
-2
10
-1
1
10
t
p
(s)
Fig 5.
Transient thermal impedance from junction to mounting base as a function of pulse duration
BUK9505-30A
All information provided in this document is subject to legal disclaimers.
© NXP B.V. 2011. All rights reserved.
Product data sheet
Rev. 3 — 20 April 2011
4 of 13
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