DATA SHEET
MOS INTEGRATED CIRCUIT
µ
PD78P083
8-BIT SINGLE-CHIP MICROCONTROLLER
DESCRIPTION
The
µPD78P083
is a member of the
µPD78083
subseries of the 78K/0 series products. It includes an on-chip, 24-Kbyte,
one-time PROM or EPROM.
Because this device can be programmed by users, it is ideally suited for applications involving the evaluation of systems
in development stages, small-scale production of many different products, and rapid development and time-to-market of
a new product.
Caution
The
µPD78P083DU
does not maintain planned reliability when used in your systems’ mass-produced
products. Please use only experimentally or for evaluation purposes during trial manufacture.
The details of functions are described in the user’s manuals. Be sure to read the following manuals before
designing.
µPD78083
Subseries User's Manual
78K/0 Series User's Manual — Instructions
: IEU-1407
: IEU-1372
FEATURES
•
Pin-compatible with mask ROM version (except V
PP
pin)
•
Internal PROM: 24 Kbytes
Note
•
µPD78P083DU:
Reprogrammable (ideally suited for system evaluation)
•
µPD78P083CU, µPD78P083GB:
One-time programmable (ideally suited for small-scale production)
•
Internal high-speed RAM: 512 bytes
Note
•
Can be operated in the same supply voltage as the mask ROM version (V
DD
= 1.8 to 5.5 V)
•
Corresponding to QTOP
TM
Microcontrollers
Note
The internal PROM and internal high-speed RAM capacities can be changed by setting the internal memory size
switching register (IMS).
Remark
QTOP microcontroller is a general term for microcontrollers which incorporate one-time PROM and are totally
supported by NEC's programming service (from programming to marking, screening and verification).
*
Differs from the mask ROM version in the following points
The same memory mapping as the mask ROM version is enabled by setting the internal memory size switching
register (IMS).
In this document, the term PROM is used in parts common to one-time PROM versions and EPROM versions.
The information in this document is subject to change without notice.
Document No. U11006EJ1V0DS00 (1st edition)
(Previous No. IP-3556)
Date Published June 1996 P
Printed in Japan
The mark
*
shows major revised points.
©
1995
µ
PD78P083
ORDERING INFORMATION
Part Number
µPD78P083CU
µPD78P083GB-3B4
µPD78P083GB-3BS-MTX
µPD78P083DU
42-pin
44-pin
44-pin
42-pin
Package
plastic shrink DIP (600 mil)
plastic QFP (10 x 10 mm)
plastic QFP (10 x 10 mm)
ceramic shrink DIP
Internal ROM
One-Time PROM
One-Time PROM
One-Time PROM
EPROM
*
(with window) (600 mil)
Caution
µ
PD78P083GB has two kinds of package. (Refer to 9. PACKAGE DRAWINGS). Please refer an
NEC’s sales representative for the available package.
QUALITY GRADE
Part Number
µPD78P083CU
µPD78P083GB-3B4
µPD78P083GB-3BS-MTX
µPD78P083DU
Package
42-pin plastic shrink DIP (600 mil)
44-pin plastic QFP (10 x 10 mm)
44-pin plastic QFP (10 x 10 mm)
42-pin ceramic shrink DIP
(with window) (600 mil)
Quality Grades
Standard
Standard
Standard
Not applicable
Please refer to “Quality grades on NEC Semiconductor Devices” (Document number IEI-1209) published by NEC
Corporation to know the specification of quality grade on the devices and its recommended applications.
2
µ
PD78P083
78K/0 SERIES DEVELOPMENT
The following shows the 78K/0 series products development. Subseries names are shown inside frames.
Products in mass production
Products under development
Y subseries products are compatible with I
2
C bus.
Control
100-pin
100-pin
80-pin
80-pin
64-pin
64-pin
64-pin
64-pin
42/44-pin
µPD78078
µPD78070A
µPD78058F
µPD78054
µPD78018F
µPD78014
µPD780001
µPD78002
µPD78083
µPD78002Y
µPD78078Y
µPD78070AY
µPD78058FY
µPD78054Y
µPD78018FY
µPD78014Y
A timer was added to the µPD78054 and external interface function was enhanced
ROM-less versions of the µPD78078
EMI noise reduced product of the µPD78054
UART and D/A converter were added to the µPD78014 and I/O was enhanced
Low-voltage (1.8 V) operation versions of the µPD78014 with several ROM and RAM
capacities are available.
An A/D converter and 16-bit timer were added to the µPD78002
An A/D converter was added to the µPD78002
Basic subseries for control
On-chip UART, capable of operating at a low voltage (1.8 V)
FIP
TM
drive
100-pin
78K/0
Series
80-pin
64-pin
µPD780208
µPD78044A
µPD78024
The I/O and FIP C/D of the µPD78044A were enhanced. Display output total: 53
A 6-bit U/D counter was added to the µPD78024. Display output total: 34
Basic subseries for driving FIP. Display output total: 26
LCD drive
100-pin
100-pin
100-pin
µPD780308
µPD78064B
µPD78064
µPD78064Y
µPD780308Y
The enhanced SIO to the µPD78064 and increased ROM and RAM capacities
EMI noise reduced product of the µPD78064
Subseries for driving LCDs, On-chip UART
IEBus
TM
supported
80-pin
µPD78098
The IEBus controller was added to the µPD78054
LV control
64-pin
µPD78P0914
On-chip PWM, LV digital code decoder, and Hsync counter
3
µ
PD78P083
The following table shows the differences among subseries functions.
Function
Part Number
Control
µPD78078
µPD78070A
ROM
Capacity
Timer
8-bit 8-bit
D/A
2ch
3ch (UART: 1ch) 88
61
69
2.0 V
–
2ch
53
1.8 V
2.7 V
–
–
1ch
–
1ch
1ch
1ch
–
8ch
8ch
–
1ch
39
53
1ch (UART: 1ch) 33
2ch
74
68
54
1ch
1ch
1ch
8ch
–
3ch (UART: 1ch) 57
2ch (UART: 1ch)
1.8 V
2.0 V
–
1.8 V
2.7 V
–
Available
–
–
Serial Interface
I/O
V
DD
MIN. External
Value
1.8 V
2.7 V
Expansion
Available
8-bit 16-bit
Watch
WDT A/D
1ch
1ch
1ch
8ch
32 K to 60 K 4ch
–
µPD78058F
48 K to 60 K 2ch
µPD78054
16 K to 60 K
µPD78018F
8 K to 60 K
µPD78014
8 K to 32 K
µPD780001
8 K
µPD78002
µPD78083
FIP drive
µPD780208
32 K to 60 K 2ch
µPD78044A
16 K to 40 K
µPD78024
LCD drive
24 K to 32 K
8 K to 16 K
µPD780308
48 K to 60 K 2ch
µPD78064B
32 K
µPD78064
16 K to 32 K
32 K to 60 K 2ch
IEBus
supported
LV control
µPD78098
1ch
1ch
1ch
8ch
2ch
3ch (UART: 1ch) 69
2.7 V
Available
µPD78P0914
32 K
6ch
–
–
1ch
8ch
–
2ch
54
4.5 V
Available
4
µ
PD78P083
FUNCTION DESCRIPTION
Item
Internal memory
Function
• PROM: 24 Kbytes
• RAM
Internal high-speed RAM: 512 bytes
Memory space
General register
Instruction cycles
Instruction set
64 Kbytes
8 bits x 32 registers (8 bits x 8 registers x 4 banks)
Instruction execution time variable function is integrated.
0.4
µs/0.8 µs/1.6 µs/3.2 µs/6.4 µs/12.8 µs
(@5.0-MHz operation with main system clock)
• 16-bit operation
• Multiply/divide (8 bits x 8 bits, 16 bits
÷
8 bits)
• Bit manipulation (set, reset, test, Boolean operation)
• BCD adjust, etc.
I/O ports
Total
• CMOS input
• CMOS input/output
A/D converter
Serial interface
Timer
Timer output
Clock output
Buzzer output
Vectored
interrupts
Maskable interrupts
Non-maskable interrupt
Software interrupt
Power supply voltage
Operating ambient temperature
Packages
: 33
: 1
: 32
Note
Note
• 8-bit resolution x 8 channels
• 3-wire serial I/O/UART mode selectable: 1 channel
• 8-bit timer/event counter: 2 channels
• Watchdog timer: 1 channel
2 pins (8-bit PWM output enable)
19.5 kHz, 39.1 kHz, 78.1 kHz, 156 kHz, 313 kHz, 625 kHz, 1.25 MHz, 2.5 MHz, and
5.0 MHz (@ 5.0-MHz operation with main system clock)
1.2 kHz, 2.4 kHz, 4.9 kHz, and 9.8 kHz
(@ 5.0-MHz operation with main system clock)
Internal
Internal
Internal
:
:
:
8
1
1
external
:
3
V
DD
= 1.8 to 5.5 V
T
A
= –40 to +85°C
• 42-pin plastic shrink DIP (600 mil)
• 44-pin plastic QFP (10 x 10 mm)
• 42-pin ceramic shrink DIP (with window) (600 mil)
Note
Internal PROM and high-speed RAM capacities can be changed by setting the internal memory size switching
register (IMS).
5
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