DATA SHEET
µ
PD784907, 784908
16-BIT SINGLE-CHIP MICROCONTROLLER
MOS INTEGRATED CIRCUIT
The
µ
PD784907 and
µ
PD784908 are products of the
µ
PD784908 Subseries in the 78K/IV Series. These products
contain various peripheral hardware such as IEBus
TM
controller, ROM, RAM, I/O ports, 8-bit resolution A/D, timers,
serial interface, and interrupt functions, as well as a high-speed, high-performance CPU.
In addition, the
µ
PD78P4908 (one-time PROM product), which is used to evaluate the functions of mask ROM
versions, and development tools are also available.
Detailed function descriptions are provided in the following user's manuals. Be sure to read them before
designing.
µ
PD784908 Subseries User's Manual Hardware : U11787E
78K/IV Series User's Manual Instruction
: U10905E
FEATURES
•
78K/IV Series
•
Minimum instruction execution time: 320 ns (at 6.29 MHz)
160 ns (at 12.58 MHz)
•
Watchdog timer: 1 channel
•
Clock output function
Selectable from f
CLK
, f
CLK
/2, f
CLK
/4, f
CLK
/8, or f
CLK
/16
•
Number of I/O ports: 80
•
Timer/counters: 16-bit timer/counter
×
3 units
16-bit timer
×
1 unit
•
Serial interface: 4 channels
UART/IOE (3-wire serial I/O): 2 channels
CSI (3-wire serial I/O):
2 channels
•
A/D converter: 8-bit resolution
×
8 channels
•
On-chip IEBus controller
•
Watch timer
•
Low-power consumption
•
Supply voltage: V
DD
= 4.0 to 5.5 V
(Main clock: f
XX
= 12.58 MHz,
internal system clock = f
XX
,
f
CYK
= 79 ns)
V
DD
= 3.5 to 5.5 V
(Other than above, f
CYK
= 159 ns)
•
PWM outputs: 2
•
Standby function
HALT/STOP/IDLE mode
•
Clock frequency division function
APPLICATIONS
Car audios, etc.
This document describes the
µ
PD784908 unless otherwise specified.
The information in this document is subject to change without notice.
Document No. U11680EJ2V0DS00 (2nd edition)
Date Published February 1999 N CP(K)
Printed in Japan
The mark
shows major revised points.
©
1996
µ
PD784907, 784908
ORDERING INFORMATION
Part number
Package
100-pin plastic QFP (14
×
20 mm)
100-pin plastic QFP (14
×
20 mm)
Internal ROM
(bytes)
Internal RAM
(bytes)
3,584
4,352
µ
PD784907GF-×××-3BA
µ
PD784908GF-×××-3BA
96 K
128 K
Remark
×××
indicates ROM code suffix.
2
Data Sheet U11680EJ2V0DS00
µ
PD784907, 784908
78K/IV SERIES PRODUCT LINEUP
: Under mass production
: Under development
I
2
C bus supported
Multi-master I
2
C bus supported
µ
PD784038Y
Standard models
µ
PD784225Y
µ
PD784225
80 pins,
ROM correction added
Multi-master I
2
C bus supported
µ
PD784038
Enhanced internal memory capacity,
pin compatible with the
µ
PD784026
Multi-master I
2
C bus supported
µ
PD784026
Enhanced A/D,
16-bit timer,
and power
management
µ
PD784216Y
µ
PD784216
100 pins,
enhanced I/O and
internal memory capacity
µ
PD784218Y
µ
PD784218
Enhanced internal memory capacity,
ROM correction added
µ
PD784054
µ
PD784046
ASSP models
On-chip 10-bit A/D
µ
PD784955
For DC inverter control
µ
PD784938
µ
PD784908
On-chip IEBus
controller
Enhanced functions of the
µ
PD784908,
enhanced internal memory capacity,
ROM correction added
Multi-master I
2
C bus supported
µ
PD784928Y
µ
PD784928
µ
PD784915
For software servo control,
on-chip analog circuit
for VCR,
enhanced timer
Enhanced functions of the
µ
PD784915
Data Sheet U11680EJ2V0DS00
3
µ
PD784907, 784908
FUNCTIONS
Part Number
Item
Number of basic instructions
(mnemonics)
General-purpose register
Minimum instruction execution
time
Internal
memory
Memory space
I/O ports
Total
Input
Input/output
Additional
function
pins
Note
LED direct
drive outputs
Transistor
direct drive
N-ch open
drain
Real-time output ports
IEBus controller
Timer/counter
ROM
RAM
113
8 bits
×
16 registers
×
8 banks, or 16 bits
×
8 registers
×
8 banks (memory mapping)
320 ns/636 ns/1.27
µ
s/2.54
µ
s (at 6.29 MHz)
160 ns/320 ns/636 ns/1.27
µ
s (at 12.58 MHz)
96 K
3,584 bytes
128 K
4,352 bytes
µ
PD784907
µ
PD784908
1 Mbyte with program and data spaces combined
80
8
72
24
8
4
4 bits
×
2, or 8 bits
×
1
Incorporated (simplified)
Timer/counter 0:
(16 bits)
Timer register
×
1
Capture register
×
1
Compare register
×
2
Timer/counter 1:
(16 bits)
Timer register
×
1
Capture register
×
1
Capture/compare register
×
1
Compare register
×
1
Timer/counter 2:
(16 bits)
Timer register
×
1
Capture register
×
1
Capture/compare register
×
1
Compare register
×
1
Timer 3:
(16 bits)
Timer register
×
1
Compare register
×
1
Pulse output capability
• Toggle output
• PWM/PPG output
Pulse output capability
• Toggle output
• PWM/PPG output
• One-shot pulse output
Real-time output port
Watch timer
Interrupt requests are generated at 0.5-second intervals. (A watch clock oscillator is
incorporated.)
Either the main clock (6.29 MHz/12.58 MHz) or watch clock (32.7 kHz) can be selected
as the input clock.
Clock output
PWM outputs
Serial interface
A/D converter
Selectable from f
CLK
, f
CLK
/2, f
CLK
/4, f
CLK
/8, or f
CLK
/16 (can be used as a 1-bit output port)
12-bit resolution
×
2 channels
UART/IOE (3-wire serial I/O): 2 channels (on-chip baud rate generator)
CSI (3-wire serial I/O):
2 channels
8-bit resolution
×
8 channels
Note
Additional function pins are included in the I/O pins.
4
Data Sheet U11680EJ2V0DS00
µ
PD784907, 784908
Part Number
Item
Watchdog timer
Standby
Interrupt
Hardware source
Software source
Non-maskable
Maskable
1 channel
µ
PD784907
µ
PD784908
HALT/STOP/IDLE modes
27 (20 internal, 7 external (sampling clock variable input: 1))
BRK or BRKCS instruction, operand error
1 internal, 1 external
19 internal, 6 external
4-level programmable priority
3 operation statuses: vectored interrupt, macro service, context switching
Power supply voltage
Package
V
DD
= 4.0 to 5.5 V (Main clock: f
XX
= 12.58 MHz, internal system clock = f
XX
, f
CYK
= 79 ns)
V
DD
= 3.5 to 5.5 V (other than above, f
CYK
= 159 ns)
100-pin plastic QFP (14
×
20 mm)
Data Sheet U11680EJ2V0DS00
5
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