K4T1G044QE-HCE70 datasheet, PDF

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K4T1G044QE-HCE70: DescriptionDDR DRAM, 256MX4, 0.4ns, CMOS, PBGA60, HALOGEN FREE AND ROHS COMPLIANT, FBGA-60; Categorystorage storage; File Size1019KB，45 Pages; ManufacturerSAMSUNG; Websitehttp://www.samsung.com/Products/Semiconductor/; Environmental Compliance

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K4T1G044QE-HCE70 Overview

DDR DRAM, 256MX4, 0.4ns, CMOS, PBGA60, HALOGEN FREE AND ROHS COMPLIANT, FBGA-60

K4T1G044QE-HCE70 Parametric

Parameter Name	Attribute value
Is it Rohs certified?	conform to
Maker	SAMSUNG
Parts packaging code	BGA
package instruction	TFBGA, BGA60,9X11,32
Contacts	60
Reach Compliance Code	unknown
ECCN code	EAR99
access mode	MULTI BANK PAGE BURST
Maximum access time	0.4 ns
Other features	AUTO/SELF REFRESH
Maximum clock frequency (fCLK)	400 MHz
I/O type	COMMON
interleaved burst length	4,8
JESD-30 code	R-PBGA-B60
length	9.5 mm
memory density	1073741824 bit
Memory IC Type	DDR DRAM
memory width	4
Number of functions	1
Number of ports	1
Number of terminals	60
word count	268435456 words
character code	256000000
Operating mode	SYNCHRONOUS
Maximum operating temperature	85 °C
Minimum operating temperature
organize	256MX4
Output characteristics	3-STATE
Package body material	PLASTIC/EPOXY
encapsulated code	TFBGA
Encapsulate equivalent code	BGA60,9X11,32
Package shape	RECTANGULAR
Package form	GRID ARRAY, THIN PROFILE, FINE PITCH
Peak Reflow Temperature (Celsius)	NOT SPECIFIED
power supply	1.8 V
Certification status	Not Qualified
refresh cycle	8192
Maximum seat height	1.2 mm
self refresh	YES
Continuous burst length	4,8
Maximum slew rate	0.165 mA
Maximum supply voltage (Vsup)	1.9 V
Minimum supply voltage (Vsup)	1.7 V
Nominal supply voltage (Vsup)	1.8 V
surface mount	YES
technology	CMOS
Temperature level	OTHER
Terminal form	BALL
Terminal pitch	0.8 mm
Terminal location	BOTTOM
Maximum time at peak reflow temperature	NOT SPECIFIED
width	7.5 mm

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K4T1G044QE

K4T1G084QE

K4T1G164QE

DDR2 SDRAM

1Gb E-die DDR2 SDRAM Specification

60FBGA & 84FBGA with Lead-Free & Halogen-Free

(RoHS compliant)

INFORMATION IN THIS DOCUMENT IS PROVIDED IN RELATION TO SAMSUNG PRODUCTS,

AND IS SUBJECT TO CHANGE WITHOUT NOTICE. NOTHING IN THIS DOCUMENT SHALL BE

CONSTRUED AS GRANTING ANY LICENSE, EXPRESS OR IMPLIED, BY ESTOPPEL OR OTHER-

WISE, TO ANY INTELLECTUAL PROPERTY RIGHTS IN SAMSUNG PRODUCTS OR TECHNOL-

OGY. ALL INFORMATION IN THIS DOCUMENT IS PROVIDED ON AS "AS IS" BASIS WITHOUT

GUARANTEE OR WARRANTY OF ANY KIND.

1. For updates or additional information about Samsung products, contact your nearest Samsung office.

2. Samsung products are not intended for use in life support, critical care, medical, safety equipment, or similar

applications where Product failure could result in loss of life or personal or physical harm, or any military or

defense application, or any governmental procurement to which special terms or provisions may apply.

* Samsung Electronics reserves the right to change products or specification without notice.

1 of 45

Rev. 1.1 December 2008

K4T1G044QE

K4T1G084QE

K4T1G164QE

DDR2 SDRAM

Table of Contents

1.0 Ordering Information ................................................................................................................... 4

2.0 Key Features ................................................................................................................................ 4

3.0 Package Pinout/Mechanical Dimension & Addressing ............................................................ 5

3.1 x4 package pinout (Top View) : 60ball FBGA Package

....................................................................... 5

3.2 x8 package pinout (Top View) : 60ball FBGA Package

........................................................................ 6

3.3 x16 package pinout (Top View) : 84ball FBGA Package

..................................................................... 7

3.4 FBGA Package Dimension (x4/x8)

.................................................................................................. 8

3.5 FBGA Package Dimension (x16)

..................................................................................................... 9

4.0 Input/Output Functional Description ....................................................................................... 10

5.0 DDR2 SDRAM Addressing ........................................................................................................ 11

6.0 Absolute Maximum DC Ratings ................................................................................................ 12

7.0 AC & DC Operating Conditions ................................................................................................ 12

7.1 Recommended DC Operating Conditions (SSTL - 1.8)

..................................................................... 12

7.2 Operating Temperature Condition

................................................................................................ 13

7.3 Input DC Logic Level

................................................................................................................... 13

7.4 Input AC Logic Level

................................................................................................................... 13

............................................................................................................ 13

7.6 Differential input AC logic Level

................................................................................................... 14

7.5 AC Input Test Conditions

................................................................................................ 14

8.0 ODT DC electrical characteristics ............................................................................................ 14

9.0 OCD default characteristics ...................................................................................................... 15

10.0 IDD Specification Parameters and Test Conditions ............................................................. 16

11.0 DDR2 SDRAM IDD Spec Table ................................................................................................ 18

12.0 Input/Output capacitance ........................................................................................................ 19

13.0 Electrical Characteristics & AC Timing for DDR2-800/667 ................................................... 19

7.7 Differential AC output parameters

........................................................................................ 19

13.2 Speed Bins and CL, tRCD, tRP, tRC and tRAS for Corresponding Bin

............................................. 19

13.3 Timing Parameters by Speed Grade

............................................................................................ 20

14.0 General notes, which may apply for all AC parameters....................................................... 22

15.0 Specific Notes for dedicated AC parameters ........................................................................ 24

13.1 Refresh Parameters by Device Density

2 of 45

Rev. 1.1 December 2008

K4T1G044QE-HCE70 Related Products

	K4T1G044QE-HCE70	K4T1G164QE-HCE70	K4T1G164QE-HCE60	K4T1G164QE-HCF70	K4T1G084QE-HCE60	K4T1G084QE-HCF70	K4T1G044QE-HCE60	K4T1G084QE-HCE70	K4T1G044QE-HCF70
Description	DDR DRAM, 256MX4, 0.4ns, CMOS, PBGA60, HALOGEN FREE AND ROHS COMPLIANT, FBGA-60	DDR DRAM, 64MX16, 0.4ns, CMOS, PBGA84, HALOGEN FREE AND ROHS COMPLIANT, FBGA-84	DDR DRAM, 64MX16, 0.45ns, CMOS, PBGA84, HALOGEN FREE AND ROHS COMPLIANT, FBGA-84	DDR DRAM, 64MX16, 0.4ns, CMOS, PBGA84, HALOGEN FREE AND ROHS COMPLIANT, FBGA-84	DDR DRAM, 128MX8, 0.45ns, CMOS, PBGA60, HALOGEN FREE AND ROHS COMPLIANT, FBGA-60	DDR DRAM, 128MX8, 0.4ns, CMOS, PBGA60, HALOGEN FREE AND ROHS COMPLIANT, FBGA-60	DDR DRAM, 256MX4, 0.45ns, CMOS, PBGA60, HALOGEN FREE AND ROHS COMPLIANT, FBGA-60	DDR DRAM, 128MX8, 0.4ns, CMOS, PBGA60, HALOGEN FREE AND ROHS COMPLIANT, FBGA-60	DDR DRAM, 256MX4, 0.4ns, CMOS, PBGA60, HALOGEN FREE AND ROHS COMPLIANT, FBGA-60
Is it Rohs certified?	conform to	conform to	conform to	conform to	conform to	conform to	conform to	conform to	conform to
Parts packaging code	BGA	BGA	BGA	BGA	BGA	BGA	BGA	BGA	BGA
package instruction	TFBGA, BGA60,9X11,32	TFBGA, BGA84,9X15,32	TFBGA, BGA84,9X15,32	TFBGA, BGA84,9X15,32	TFBGA, BGA60,9X11,32	TFBGA, BGA60,9X11,32	TFBGA, BGA60,9X11,32	TFBGA, BGA60,9X11,32	TFBGA, BGA60,9X11,32
Contacts	60	84	84	84	60	60	60	60	60
Reach Compliance Code	unknown	unknown	unknown	unknown	unknown	unknown	unknown	unknown	unknow
ECCN code	EAR99	EAR99	EAR99	EAR99	EAR99	EAR99	EAR99	EAR99	EAR99
access mode	MULTI BANK PAGE BURST	MULTI BANK PAGE BURST	MULTI BANK PAGE BURST	MULTI BANK PAGE BURST	MULTI BANK PAGE BURST	MULTI BANK PAGE BURST	MULTI BANK PAGE BURST	MULTI BANK PAGE BURST	MULTI BANK PAGE BURST
Maximum access time	0.4 ns	0.4 ns	0.45 ns	0.4 ns	0.45 ns	0.4 ns	0.45 ns	0.4 ns	0.4 ns
Other features	AUTO/SELF REFRESH	AUTO/SELF REFRESH	AUTO/SELF REFRESH	AUTO/SELF REFRESH	AUTO/SELF REFRESH	AUTO/SELF REFRESH	AUTO/SELF REFRESH	AUTO/SELF REFRESH	AUTO/SELF REFRESH
Maximum clock frequency (fCLK)	400 MHz	400 MHz	333 MHz	400 MHz	333 MHz	400 MHz	333 MHz	400 MHz	400 MHz
I/O type	COMMON	COMMON	COMMON	COMMON	COMMON	COMMON	COMMON	COMMON	COMMON
interleaved burst length	4,8	4,8	4,8	4,8	4,8	4,8	4,8	4,8	4,8
JESD-30 code	R-PBGA-B60	R-PBGA-B84	R-PBGA-B84	R-PBGA-B84	R-PBGA-B60	R-PBGA-B60	R-PBGA-B60	R-PBGA-B60	R-PBGA-B60
length	9.5 mm	12.5 mm	12.5 mm	12.5 mm	9.5 mm	9.5 mm	9.5 mm	9.5 mm	9.5 mm
memory density	1073741824 bit	1073741824 bit	1073741824 bit	1073741824 bit	1073741824 bit	1073741824 bit	1073741824 bit	1073741824 bit	1073741824 bi
Memory IC Type	DDR DRAM	DDR DRAM	DDR DRAM	DDR DRAM	DDR DRAM	DDR DRAM	DDR DRAM	DDR DRAM	DDR DRAM
memory width	4	16	16	16	8	8	4	8	4
Number of functions	1	1	1	1	1	1	1	1	1
Number of ports	1	1	1	1	1	1	1	1	1
Number of terminals	60	84	84	84	60	60	60	60	60
word count	268435456 words	67108864 words	67108864 words	67108864 words	134217728 words	134217728 words	268435456 words	134217728 words	268435456 words
character code	256000000	64000000	64000000	64000000	128000000	128000000	256000000	128000000	256000000
Operating mode	SYNCHRONOUS	SYNCHRONOUS	SYNCHRONOUS	SYNCHRONOUS	SYNCHRONOUS	SYNCHRONOUS	SYNCHRONOUS	SYNCHRONOUS	SYNCHRONOUS
Maximum operating temperature	85 °C	85 °C	85 °C	85 °C	85 °C	85 °C	85 °C	85 °C	85 °C
organize	256MX4	64MX16	64MX16	64MX16	128MX8	128MX8	256MX4	128MX8	256MX4
Output characteristics	3-STATE	3-STATE	3-STATE	3-STATE	3-STATE	3-STATE	3-STATE	3-STATE	3-STATE
Package body material	PLASTIC/EPOXY	PLASTIC/EPOXY	PLASTIC/EPOXY	PLASTIC/EPOXY	PLASTIC/EPOXY	PLASTIC/EPOXY	PLASTIC/EPOXY	PLASTIC/EPOXY	PLASTIC/EPOXY
encapsulated code	TFBGA	TFBGA	TFBGA	TFBGA	TFBGA	TFBGA	TFBGA	TFBGA	TFBGA
Encapsulate equivalent code	BGA60,9X11,32	BGA84,9X15,32	BGA84,9X15,32	BGA84,9X15,32	BGA60,9X11,32	BGA60,9X11,32	BGA60,9X11,32	BGA60,9X11,32	BGA60,9X11,32
Package shape	RECTANGULAR	RECTANGULAR	RECTANGULAR	RECTANGULAR	RECTANGULAR	RECTANGULAR	RECTANGULAR	RECTANGULAR	RECTANGULAR
Package form	GRID ARRAY, THIN PROFILE, FINE PITCH	GRID ARRAY, THIN PROFILE, FINE PITCH	GRID ARRAY, THIN PROFILE, FINE PITCH	GRID ARRAY, THIN PROFILE, FINE PITCH	GRID ARRAY, THIN PROFILE, FINE PITCH	GRID ARRAY, THIN PROFILE, FINE PITCH	GRID ARRAY, THIN PROFILE, FINE PITCH	GRID ARRAY, THIN PROFILE, FINE PITCH	GRID ARRAY, THIN PROFILE, FINE PITCH
Peak Reflow Temperature (Celsius)	NOT SPECIFIED	NOT SPECIFIED	260	NOT SPECIFIED	NOT SPECIFIED	NOT SPECIFIED	NOT SPECIFIED	NOT SPECIFIED	NOT SPECIFIED
power supply	1.8 V	1.8 V	1.8 V	1.8 V	1.8 V	1.8 V	1.8 V	1.8 V	1.8 V
Certification status	Not Qualified	Not Qualified	Not Qualified	Not Qualified	Not Qualified	Not Qualified	Not Qualified	Not Qualified	Not Qualified
refresh cycle	8192	8192	8192	8192	8192	8192	8192	8192	8192
Maximum seat height	1.2 mm	1.2 mm	1.2 mm	1.2 mm	1.2 mm	1.2 mm	1.2 mm	1.2 mm	1.2 mm
self refresh	YES	YES	YES	YES	YES	YES	YES	YES	YES
Continuous burst length	4,8	4,8	4,8	4,8	4,8	4,8	4,8	4,8	4,8
Maximum slew rate	0.165 mA	0.2 mA	0.185 mA	0.2 mA	0.155 mA	0.17 mA	0.15 mA	0.17 mA	0.165 mA
Maximum supply voltage (Vsup)	1.9 V	1.9 V	1.9 V	1.9 V	1.9 V	1.9 V	1.9 V	1.9 V	1.9 V
Minimum supply voltage (Vsup)	1.7 V	1.7 V	1.7 V	1.7 V	1.7 V	1.7 V	1.7 V	1.7 V	1.7 V
Nominal supply voltage (Vsup)	1.8 V	1.8 V	1.8 V	1.8 V	1.8 V	1.8 V	1.8 V	1.8 V	1.8 V
surface mount	YES	YES	YES	YES	YES	YES	YES	YES	YES
technology	CMOS	CMOS	CMOS	CMOS	CMOS	CMOS	CMOS	CMOS	CMOS
Temperature level	OTHER	OTHER	OTHER	OTHER	OTHER	OTHER	OTHER	OTHER	OTHER
Terminal form	BALL	BALL	BALL	BALL	BALL	BALL	BALL	BALL	BALL
Terminal pitch	0.8 mm	0.8 mm	0.8 mm	0.8 mm	0.8 mm	0.8 mm	0.8 mm	0.8 mm	0.8 mm
Terminal location	BOTTOM	BOTTOM	BOTTOM	BOTTOM	BOTTOM	BOTTOM	BOTTOM	BOTTOM	BOTTOM
Maximum time at peak reflow temperature	NOT SPECIFIED	NOT SPECIFIED	NOT SPECIFIED	NOT SPECIFIED	NOT SPECIFIED	NOT SPECIFIED	NOT SPECIFIED	NOT SPECIFIED	NOT SPECIFIED
width	7.5 mm	7.5 mm	7.5 mm	7.5 mm	7.5 mm	7.5 mm	7.5 mm	7.5 mm	7.5 mm
Maker	SAMSUNG	-	SAMSUNG	SAMSUNG	SAMSUNG	SAMSUNG	SAMSUNG	SAMSUNG	SAMSUNG

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