WF128K32-XXX5
128K
X
32 5V FL ASH MODULE, SMD 5962-94716
FEATURES
n
Access Times of 50*, 60, 70, 90, 120, 150ns
n
n
5 Volt Programming. 5V ± 10% Supply
n
Low Power CMOS, 1mA Standby Typical
n
Embedded Erase and Program Algorithms
n
TTL Compatible Inputs and CMOS Outputs
n
Built-in Decoupling Caps and Multiple Ground Pins for
Packaging:
•66 pin, PGA Type, 1.075 inch square, Hermetic
Ceramic HIP (Package 400)
•68 lead, Hermetic CQFP (G2U) , 22.4mm (0.880 inch)
square, 3.56mm (0.140 inch) high (Package 510)
•68 lead, Hermetic CQFP (G1U), 23.9mm (0.940 inch)
square, 3.56mm (0.140 inch) high (Package 519)
•68 lead, Hermetic CQFP (G1T), 23.9mm (0.940 inch)
square, 4.06mm (0.160 inch) high (Package 524)
1
Low Noise Operation
n
n
Page Program Operation and Internal Program Control
Time
Weight
WF128K32-XG1UX5 - 5 grams typical
WF128K32-XG1TX5 - 5 grams typical
WF128K32-XG2UX5
1
- 8 grams typical
WF128K32-XH1X5 - 13 grams typical
n
Sector Architecture
•8 equal size sectors of 16KBytes each
•Any combination of sectors can be concurrently
erased.
Also supports full chip erase
n
100,000 Erase/Program Cycles Typical, 0°C to +70°C
n
Organized as 128Kx32
n
Commercial, Industrial and Military Temperature Ranges
FIG. 1
Note 1: Package Not Recommended For New Design
Note: For programming information refer to Flash Programming 1M5
Application Note.
* The access time of 50ns is available in Industrial and Commercial temperature
ranges only.
PIN CONFIGURATION FOR WF128K32N-XH1X5
TOP VIEW
PIN DESCRIPTION
I/O
0-31
A
0-16
WE
1-4
CS
1-4
OE
V
CC
GND
NC
Data Inputs/Outputs
Address Inputs
Write Enables
Chip Selects
Output Enable
Power Supply
Ground
Not Connected
BLOCK DIAGRAM
December 2001 Rev. 4
1
White Electronic Designs Corporation • (602) 437-1520 • www.whiteedc.com
WF128K32-XXX5
FIG. 3
PIN CONFIGURATION FOR WF128K32-XG1UX5, WF128K32-XG1TX5 AND
WF128K32-XG2UX5
1
TOP VIEW
NC
A
0
A
1
A
2
A
3
A
4
A
5
CS
3
GND
CS
4
WE
1
A
6
A
7
A
8
A
9
A
10
V
CC
PIN DESCRIPTION
I/O
0-31
A
0-16
I/O
16
I/O
17
I/O
18
I/O
19
I/O
20
I/O
21
I/O
22
I/O
23
GND
I/O
24
I/O
25
I/O
26
I/O
27
I/O
28
I/O
29
I/O
30
I/O
31
Data Inputs/Outputs
Address Inputs
Write Enables
Chip Selects
Output Enable
Power Supply
Ground
Not Connected
9 8 7 6 5 4 3 2 1 68 67 66 65 64 63 62 61
I/O
0
I/O
1
I/O
2
I/O
3
I/O
4
I/O
5
I/O
6
I/O
7
GND
I/O
8
I/O
9
I/O
10
I/O
11
I/O
12
I/O
13
I/O
14
I/O
15
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43
60
59
58
57
56
55
54
53
52
51
50
49
48
47
46
45
44
WE
1-4
CS
1-4
OE
V
CC
GND
NC
BLOCK DIAGRAM
CS
2
NC
E
2
E
3
A
16
CS
1
OE
E
4
NC
A
11
A
12
A
13
A
14
V
CC
A
15
NC
NC
Note 1: Package Not Recommended For New Design
White Electronic Designs Corporation • (602) 437-1520 • www.whiteedc.com
2
WF128K32-XXX5
ABSOLUTE MAXIMUM RATINGS (1)
Parameter
Unit
RECOMMENDED OPERATING CONDITIONS
Parameter
Symbol
Min
Max
Unit
Operating Temperature
Supply Voltage Range (V
CC
)
Signal voltage range (any pin except A9) (2)
Storage Temperature Range
Lead Temperature (soldering, 10 seconds)
Data Retention Mil Temp
Endurance (write/erase cycles) Mil Temp
A
9
Voltage for sector protect (V
ID
) (3)
NOTES:
-55 to +125
-2.0 to +7.0
-2.0 to +7.0
-65 to +150
+300
10 years
10,000 cycles min.
-2.0 to +14.0
°C
V
V
°C
°C
Supply Voltage
Input High Voltage
Input Low Voltage
Operating Temp. (Mil.)
A
9
Voltage for Sector Protect
V
CC
V
IH
V
IL
T
A
V
ID
4.5
2.0
-0.5
-55
11.5
5.5
V
CC
+ 0.3
+0.8
+125
12.5
V
V
V
°C
V
CAPACITANCE
V
Parameter
(T
A
= +25ºC)
Symbol
Conditions
Max
Unit
1. Stresses above the absolute maximum rating may cause permanent damage to
the device. Extended operation at the maximum levels may degrade
performance and affect reliability.
2. Minimum DC voltage on input or I/O pins is -0.5V. During voltage transitions,
inputs may overshoot Vss to -2.0 V for periods of up to 20ns. Maximum DC
voltage on output and I/O pins is Vcc + 0.5V. During voltage transitions, outputs
may overshoot to Vcc + 2.0 V for periods of up to 20ns.
3. Minimum DC input voltage on A9 pin is -0.5V. During voltage transitions, A9
may overshoot Vss to -2V for periods of up to 20ns. Maximum DC input voltage
on A9 is +13.5V which may overshoot to 14.0 V for periods up to 20ns.
OE capacitance
WE
1-4
capacitance
HIP (PGA)
CQFP G2U/G1U/G1T
CS
1-4
capacitance
Data I/O capacitance
Address input capacitance
C
OE
C
WE
V
IN
= 0 V, f = 1.0 MHz
V
IN
= 0 V, f = 1.0 MHz
50
20
15
pF
pF
C
CS
C
I/O
C
AD
V
IN
= 0 V, f = 1.0 MHz
V
I/O
= 0 V, f = 1.0 MHz
V
IN
= 0 V, f = 1.0 MHz
20
20
50
pF
pF
pF
This parameter is guaranteed by design but not tested.
DC CHAR ACTERISTICS - CMOS COMPATIBLE
(V
CC
= 5.0V, V
SS
= 0V, T
A
= -55°C TO +125°C)
Parameter
Symbol
Conditions
Min
Max
Unit
Input Leakage Current
Output Leakage Current
V
CC
Active Current for Read (1)
V
CC
Active Current for Program
or Erase (2)
V
CC
Standby Current
V
CC
Static Current
Output Low Voltage
Output High Voltage
Output High Voltage
Low V
CC
Lock Out Voltage
NOTES:
I
LI
I
LOx32
I
CC1
I
CC2
I
CC3
I
CC4
V
OL
V
OH1
V
OH2
V
LKO
V
CC
= 5.5, V
IN
= GND to V
CC
V
CC
= 5.5, V
IN
= GND to V
CC
CS = V
IL
, OE = V
IH
CS = V
IL
, OE = V
IH
V
CC
= 5.5, CS = V
IH
, f = 5MHz
V
CC
= 5.5, CS = V
IH
I
OL
= 8.0 mA, V
CC
= 4.5
I
OH
= -2.5 mA, V
CC
= 4.5
I
OH
= -100 µA, V
CC
= 4.5
0.85 x
V
CC
V
CC
-0.4
3.2
10
10
140
200
6.5
0.6
0.45
µA
µA
mA
mA
mA
mA
V
V
V
V
1. The ICC current listed includes both the DC operating current and the frequency dependent component (at 5 MHz).
The frequency component typically is less than 2 mA/MHz, with OE at VIH.
2. ICC active while Embedded Algorithm (program or erase) is in progress.
3. DC test conditions: VIL = 0.3V, VIH = VCC - 0.3V
3
White Electronic Designs Corporation • (602) 437-1520 • www.whiteedc.com
WF128K32-XXX5
AC CHARACTERISTICS WRITE/ERASE/PROGRAM OPERATIONS, CS CONTROLLED
(V
CC
= 5.0V, V
SS
= 0V, T
A
= -55°C TO+125°C)
Parameter
Symbol
-50
Min
Max
Min
-60
Max
-70
Min
Max
-90
Min
Max
-120
Min
Max
-150
Min
Max
Unit
Write Cycle Time
WE Setup Time
CS Pulse Width
Address Setup Time
Data Setup Time
Data Hold Time
Address Hold Time
WE Hold from WE High
CS Pulse Width High
Duration of Programming Operation
Duration of Erase Operation
Read Recovery before Write
Chip Programming Time
t
AVAV
t
WLEL
t
ELEH
t
AVEL
t
DVEH
t
EHDX
t
ELAX
t
EHWH
t
EHEL
t
WHWH1
t
WHWH2
t
GHEL
t
WC
t
WS
t
CP
t
AS
t
DS
t
DH
t
AH
t
WH
t
CPH
50
0
25
0
25
0
40
0
20
14
2.2
0
12.5
60
60
0
30
0
30
0
45
0
20
14
2.2
0
12.5
60
70
0
35
0
30
0
45
0
20
14
2.2
0
12.5
60
90
0
45
0
45
0
45
0
20
14
2.2
0
12.5
60
120
0
50
0
50
0
50
0
20
14
2.2
0
12.5
60
150
0
50
0
50
0
50
0
20
14
2.2
0
12.5
60
ns
ns
ns
ns
ns
ns
ns
ns
ns
µs
sec
ns
sec
FIG. 4
AC T
EST
C
IRCUIT
Parameter
AC TEST CONDITIONS
Typ
Unit
Input Pulse Levels
Input Rise and Fall
Input and Output Reference Level
Output Timing Reference Level
V
IL
= 0, V
IH
= 3.0
5
1.5
1.5
V
ns
V
V
Notes:
VZ is programmable from -2V to +7V.
IOL & IOH programmable from 0 to 16mA.
Tester Impedance Z0 = 75 ½.
VZ is typically the midpoint of VOH and VOL.
IOL & IOH are adjusted to simulate a typical resistive load circuit.
ATE tester includes jig capacitance.
White Electronic Designs Corporation • (602) 437-1520 • www.whiteedc.com
4
WF128K32-XXX5
AC CHARACTERISTICS WRITE/ERASE/PROGRAM OPERATIONS, WE CONTROLLED
(V
CC
= 5.0V, V
SS
= 0V, T
A
= -55°C TO +125°C)
Parameter
Symbol
-50
Min
Max
Min
-60
Max
-70
Min
Max
-90
Min
Max
-120
Min
Max
-150
Min
Max
Unit
Write Cycle Time
Chip Select Setup Time
Write Enable Pulse Width
Address Setup Time
Data Setup Time
Data Hold Time
Address Hold Time
Chip Select Hold Time
Write Enable Pulse Width High
Duration of Byte Programming Operation (min)
Sector Erase Time
Read Recovery Time Before Write
V
CC
Setup Time
Chip Programming Time
Output Enable Setup Time
Output Enable Hold Time (1)
1. For Toggle and Data Polling.
t
AVAV
t
ELWL
t
WLWH
t
AVWL
t
DVWH
t
WHDX
t
WLAX
t
WHEH
t
WHWL
t
WHWH1
t
WHWH2
t
GHWL
t
WC
t
CS
t
WP
t
AS
t
DS
t
DH
t
AH
t
CH
t
WPH
50
0
25
0
25
0
40
0
20
14
2.2
0
60
60
0
30
0
30
0
45
0
20
14
2.2
0
50
12.5
12.5
0
10
60
70
0
35
0
30
0
45
0
20
14
2.2
0
50
12.5
0
10
60
90
0
45
0
45
0
45
0
20
14
2.2
0
50
12.5
0
10
60
120
0
50
0
50
0
50
0
20
14
2.2
0
50
12.5
0
10
60
150
0
50
0
50
0
50
0
20
14
2.2
0
50
12.5
0
10
60
ns
ns
ns
ns
ns
ns
ns
ns
ns
µs
sec
ns
µs
sec
ns
ns
t
VCS
50
t
OES
t
OEH
0
10
AC CHARACTERISTICS READ ONLY OPERATIONS
(V
CC
= 5.0V, V
SS
= 0V, T
A
= -55°C TO +125°C)
Parameter
Symbol
-50
Min
Max
-60
Min
Max
-70
Min
Max
-90
Min
Max
-120
Min
Max
-150
Min
Max
Unit
Read Cycle Time
Address Access Time
Chip Select Access Time
OE to Output Valid
Chip Select to Output High Z (1)
OE High to Output High Z (1)
Output Hold from Address, CS or OE Change,
whichever is first
1. Guaranteed by design, not tested.
t
AVAV
t
AVQV
t
ELQV
t
GLQV
t
EHQZ
t
GHQZ
t
AXQX
t
RC
t
ACC
t
CE
t
OE
t
DF
t
DF
t
OH
50
50
50
25
20
20
0
60
60
60
30
20
20
0
70
70
70
35
20
20
0
90
90
90
40
25
25
0
120
120
120
50
30
30
0
150
150
150
55
35
35
0
ns
ns
ns
ns
ns
ns
ns
5
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