SMP-18FP datasheet, PDF - EEWORLD Datasheet

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SMP-18FP: DescriptionIC 8 CHANNEL, SAMPLE AND HOLD AMPLIFIER, 3.5 us ACQUISITION TIME, PDIP16, PLASTIC, DIP-16, Sample and Hold Circuit; CategoryAnalog mixed-signal IC Amplifier circuit; File Size298KB，8 Pages; ManufacturerADI; Websitehttps://www.analog.com

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SMP-18FP Overview

IC 8 CHANNEL, SAMPLE AND HOLD AMPLIFIER, 3.5 us ACQUISITION TIME, PDIP16, PLASTIC, DIP-16, Sample and Hold Circuit

SMP-18FP Parametric

Parameter Name	Attribute value
Is it Rohs certified?	incompatible
Maker	ADI
Parts packaging code	DIP
package instruction	DIP, DIP16,.3
Contacts	16
Reach Compliance Code	compliant
Nominal acquisition time	3.5 µs
Amplifier type	SAMPLE AND HOLD CIRCUIT
Maximum analog input voltage	17 V
Minimum analog input voltage	-17 V
maximum rate of descent	0.04 V/s
JESD-30 code	R-PDIP-T16
JESD-609 code	e0
length	20.13 mm
Negative supply voltage upper limit	-17 V
Number of functions	8
Number of terminals	16
Maximum operating temperature	85 °C
Minimum operating temperature	-40 °C
Package body material	PLASTIC/EPOXY
encapsulated code	DIP
Encapsulate equivalent code	DIP16,.3
Package shape	RECTANGULAR
Package form	IN-LINE
Peak Reflow Temperature (Celsius)	NOT SPECIFIED
power supply	+-5,12 V
Certification status	Not Qualified
Sample and hold/Track and hold	SAMPLE
Maximum seat height	5.33 mm
Maximum slew rate	8 mA
Supply voltage upper limit	17 V
Nominal supply voltage (Vsup)	12 V
surface mount	NO
technology	CMOS
Temperature level	INDUSTRIAL
Terminal surface	Tin/Lead (Sn85Pb15)
Terminal form	THROUGH-HOLE
Terminal pitch	2.54 mm
Terminal location	DUAL
Maximum time at peak reflow temperature	NOT SPECIFIED
width	7.62 mm

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SMP-18FP Related Products

	SMP-18FP	SMP-18GBC	SMP-18FS
Description	IC 8 CHANNEL, SAMPLE AND HOLD AMPLIFIER, 3.5 us ACQUISITION TIME, PDIP16, PLASTIC, DIP-16, Sample and Hold Circuit	8 CHANNEL, SAMPLE AND HOLD AMPLIFIER, UUC16, 0.080 X 0.120 INCH, DIE-16	IC 8 CHANNEL, SAMPLE AND HOLD AMPLIFIER, 3.5 us ACQUISITION TIME, PDSO16, SOIC-16, Sample and Hold Circuit
Is it Rohs certified?	incompatible	conform to	incompatible
Parts packaging code	DIP	DIE	SOIC
package instruction	DIP, DIP16,.3	0.080 X 0.120 INCH, DIE-16	SOP, SOP16,.25
Contacts	16	16	16
Reach Compliance Code	compliant	compliant	compliant
Amplifier type	SAMPLE AND HOLD CIRCUIT	SAMPLE AND HOLD CIRCUIT	SAMPLE AND HOLD CIRCUIT
Maximum analog input voltage	17 V	17 V	17 V
Minimum analog input voltage	-17 V	-17 V	-17 V
maximum rate of descent	0.04 V/s	0.04 V/s	0.04 V/s
JESD-30 code	R-PDIP-T16	R-XUUC-N16	R-PDSO-G16
Negative supply voltage upper limit	-17 V	-17 V	-17 V
Number of functions	8	8	8
Number of terminals	16	16	16
Package body material	PLASTIC/EPOXY	UNSPECIFIED	PLASTIC/EPOXY
encapsulated code	DIP	DIE	SOP
Package shape	RECTANGULAR	RECTANGULAR	RECTANGULAR
Package form	IN-LINE	UNCASED CHIP	SMALL OUTLINE
Peak Reflow Temperature (Celsius)	NOT SPECIFIED	NOT SPECIFIED	220
Certification status	Not Qualified	Not Qualified	Not Qualified
Sample and hold/Track and hold	SAMPLE	SAMPLE	SAMPLE
Maximum slew rate	8 mA	8 mA	8 mA
Supply voltage upper limit	17 V	17 V	17 V
Nominal supply voltage (Vsup)	12 V	12 V	12 V
surface mount	NO	YES	YES
technology	CMOS	CMOS	CMOS
Terminal form	THROUGH-HOLE	NO LEAD	GULL WING
Terminal location	DUAL	UPPER	DUAL
Maximum time at peak reflow temperature	NOT SPECIFIED	NOT SPECIFIED	30
Maker	ADI	-	ADI
Nominal acquisition time	3.5 µs	-	3.5 µs
JESD-609 code	e0	-	e0
length	20.13 mm	-	10.3 mm
Maximum operating temperature	85 °C	-	85 °C
Minimum operating temperature	-40 °C	-	-40 °C
Encapsulate equivalent code	DIP16,.3	-	SOP16,.25
power supply	+-5,12 V	-	+-5,12 V
Maximum seat height	5.33 mm	-	2.65 mm
Temperature level	INDUSTRIAL	-	INDUSTRIAL
Terminal surface	Tin/Lead (Sn85Pb15)	-	Tin/Lead (Sn85Pb15)
Terminal pitch	2.54 mm	-	1.27 mm
width	7.62 mm	-	7.5 mm

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