WF2M32I-90G2UQ5 datasheet, PDF

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WF2M32I-90G2UQ5: DescriptionFlash Module, 2MX32, 90ns, CQFP68, 22.40 X 22.40 MM, 3.56 MM HEIGHT, HERMETIC SEALED, CERAMIC, QFP-68; Categorystorage storage; File Size634KB，15 Pages; ManufacturerWhite Electronic Designs Corporation; Websitehttp://www.wedc.com/

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WF2M32I-90G2UQ5 Overview

Flash Module, 2MX32, 90ns, CQFP68, 22.40 X 22.40 MM, 3.56 MM HEIGHT, HERMETIC SEALED, CERAMIC, QFP-68

WF2M32I-90G2UQ5 Parametric

Parameter Name	Attribute value
Is it Rohs certified?	incompatible
Maker	White Electronic Designs Corporation
package instruction	22.40 X 22.40 MM, 3.56 MM HEIGHT, HERMETIC SEALED, CERAMIC, QFP-68
Reach Compliance Code	unknown
Maximum access time	90 ns
Other features	CAN BE CONFIGURED AS 8M X 8
Spare memory width	16
JESD-30 code	S-CQFP-G68
JESD-609 code	e4
length	22.36 mm
memory density	67108864 bit
Memory IC Type	FLASH MODULE
memory width	32
Number of functions	1
Number of terminals	68
word count	2097152 words
character code	2000000
Operating mode	ASYNCHRONOUS
Maximum operating temperature	125 °C
Minimum operating temperature	-55 °C
organize	2MX32
Package body material	CERAMIC, METAL-SEALED COFIRED
encapsulated code	QFP
Package shape	SQUARE
Package form	FLATPACK
Parallel/Serial	PARALLEL
Peak Reflow Temperature (Celsius)	NOT SPECIFIED
Programming voltage	5 V
Certification status	Not Qualified
Maximum seat height	3.51 mm
Maximum supply voltage (Vsup)	5.5 V
Minimum supply voltage (Vsup)	4.5 V
Nominal supply voltage (Vsup)	5 V
surface mount	YES
technology	CMOS
Temperature level	MILITARY
Terminal surface	GOLD
Terminal form	GULL WING
Terminal pitch	1.27 mm
Terminal location	QUAD
Maximum time at peak reflow temperature	NOT SPECIFIED
type	NOR TYPE
width	22.36 mm

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White Electronic Designs

2Mx32 5V Flash Module

FEATURES

Access Time of 90, 120, 150ns

Packaging:

• 66 pin, PGA Type, 1.185" square, Hermetic

Ceramic HIP (Package 401).

• 68 lead, Hermetic CQFP (G2U), 22.4mm (0.880")

square (Package 510) 3.56mm (0.140") height.

Designed to ﬁt JEDEC 68 lead 0.990" CQFJ

footprint (FIGURE 3)

Sector Architecture

• 32 equal size sectors of 64KBytes per each 2Mx8

chip

• Any combination of sectors can be erased. Also

supports full chip erase.

Minimum 100,000 Write/Erase Cycles Minimum

Organized as 2Mx32

WF2M32-XXX5

Commercial, Industrial, and Military

Temperature Ranges

5 Volt Read and Write. 5V ± 10% Supply.

Low Power CMOS

Data# Polling and Toggle Bit feature for detection of

program or erase cycle completion.

Supports reading or programming data to a sector

not being erased.

RESET# pin resets internal state machine to the

read mode.

Built in Decoupling Caps and Multiple Ground Pins

for Low Noise Operation, Separate Power and

Ground Planes to improve noise immunity

* This product is subject to change without notice.

Note: For programming information refer to Flash Programming 16M5 Application Note.

FIGURE 1 – PIN CONFIGURATION FOR WF2M32-XHX5

Top View

I/O

GND

I/O

OE#

I/O

GND

I/O

Pin Description

I/O0-31

A0-20

WE1-4#

CS1-4#

OE#

VCC

GND

Data Inputs/Outputs

Address Inputs

Write Enables

Chip Selects

Output Enable

Power Supply

Ground

Block Diagram

WE1# CS1#

WE2# CS2#

WE3# CS3#

WE4# CS4#

OE#

2M x 8

I/O

0-7

I/O

8-15

I/O

16-23

I/O

24-31

RESET# internally tied to V

in the HIP package for this pin con-

ﬁguration. See Alternate Pin Conﬁguration with RESET# tied to pin

12 for system control of reset (FIGURE 10, page 11).

October 2004

Rev. 5

White Electronic Designs Corporation • (602) 437-1520 • www.whiteedc.com

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