DATA SHEET
MOS INTEGRATED CIRCUIT
µ
PD75512(A)
4-BIT SINGLE-CHIP MICROCOMPUTER
DESCRIPTION
The
µ
PD75512(A) is a 4-bit single-chip microcomputer which employs 75X series architecture, and its
performance is comparable to that of an 8-bit microcomputer.
In addition to its high-speed processing capabilities, the
µ
PD75512(A) is also capable of processing data in
units of 1, 4, or in 8-bits. With its internally provided A/D converter and serial interface, the
µ
PD75512(A) provides
the highest performance in its class.
Detailed functions are described in the following user‘s manual. Be sure to read it for designing.
µ
PD75516 User‘s Maual: IEM-5049
FEATURES
• Higher reliability than
µ
PD75512
• Adequate I/O lines: 64
(can be provided with pull-up/pull-down resistors: 47)
• Built-in 8-bit serial interface: 2-ch
NEC standard serial bus interface (SBI) internally provided
• Built-in 8-bit A/D converter: 8-ch
• Variable instruction execution time function which is convenient for high-speed operation and power saving
· 0.95
µ
s/1.95
µ
s/15.3
µ
s (at 4.19 MHz operation),
· 122
µ
s (at 32.768 kHz operation)
• Program memory (ROM) size: 12,160
×
8 bits
• Data memory (RAM) size: 512
×
4 bits
• High-performance timer function: 4-ch
· 8-bit timer/event counter
· Watch timer
· 8-bit basic interval timer
· Timer/pulse generator: Capable of outputting 14-bit PWM
• Clock operation for reduced power consumption possible
(5
µ
A TYP. at 3 V operation)
• PROM version (
µ
PD75P516) available
APPLICATIONS
Switable for automotive and transportation equipments, etc.
The information in this document is subject to change without notice.
Document No. IC-2815A
(O. D. No. IC-8265A)
Date Published January 1994 P
Printed in Japan
The mark
5
shows major revised points.
©
NEC Corporation 1991
µ
PD75512(A)
ORDERING INFORMATION
Part Number
Package
80-pin plastic QFP
(14
×
20mm)
Remarks:
xxx is ROM code number.
Please refer to “Quality Grade on NEC Semiconductor Devices” (Document number IEI-1209) published by NEC
Corporation to know the specification of quality grade on the devices and its recommended applications.
Difference between
µ
PD75512(A) and
µ
PD75512
Quality Grade
Special
µ
PD75512GF(A)-xxx-3B9
Product
Item
Quality Grade
µ
PD75512(A)
µ
PD75512
Special
Standard
Absolute Maximum Ratings
Electrical
Specifications
DC Characteristics
Differ in high-level and low-level output current
Differ in low-level output voltage
A/D Converter Characteristics
Differ in ambient temperature range and absolute accuracy
2
µ
PD75512(A)
µ
PD75512(A) FUNCTIONS
Item
Internal
Memory
Size
ROM
RAM
12160
×
8 bits
512
×
4 bits
(4 bits
×
8 or 8 bits
×
4)
×
4 banks
• 0.95
µ
s/1.91
µ
s/15.3
µ
s (Main system clock: at 4.19 MHz)
• 122
µ
s (Subsystem clock: at 32.768 kHz)
64 lines
16 lines (also serve as INT, SIO, PPO, analog input; can be pulled up by software: 7
lines)
28 lines
• Can be pulled up by software: 16 lines
• Can be pulled down by mask option: 4 lines
20 lines (10 V withstand voltage; pins that can be pulled up by mask option: 20)
8-bit resolution
×
8 channels (successive approxmation type)
• Operation voltage: V
DD
= 3.5 to 6.0 V
Function
5
Genearl-Purpose Register
Instruction Cycle
Total
CMOS Inputs
Input/
Output
Ports
CMOS
Input/Outputs
N-ch Open-Drain
Input/Outputs
A/D Converter
Timer/Counter
4 channels
•
•
•
•
Timer/event counter
Basic interval timer
Timer/pulse generator (capable of outputting 14-bit PWM)
Watch timer
Serial Interface
Vector Interrupt
Test Input
2 channels
• NEC standard serial bus interface (SBI)/3-line SIO: 1 channel
• Normal clock synchronized serial interface (3-line SIO): 1 channel
External: 3, Internal: 4
External: 1, Internal: 1
• Bit data set/reset/test/boolean operation instruction
• 4-bit data transfer/operation/increment/decrement /compare instructions
• 8-bit data transfer/operation/increment/decrement /compare instructions
• Ceramic/crystal oscillator for main system clock: 4.19 MHz
• Crystal oscillator for subsystem clock: 32.768 kHz
V
DD
= 2.7 V to 6.0 V
80-pin plastic QFP (14
×
20mm)
Instruction Set
System Clock Generator
Operation Voltage
Package
3
µ
PD75512(A)
CONTENTS
1.
PIN CONFIGURATION
.....................................................................................................................
6
2.
INTERNAL BLOCK DIAGRAM
.........................................................................................................
7
3.
PIN FUNCTIONS
..............................................................................................................................
3.1
3.2
3.3
3.4
3.5
PORT PINS .............................................................................................................................................
NON-PORT PINS ...................................................................................................................................
PIN INPUT/OUTPUT CIRCUITS ............................................................................................................
RECOMMENDED CONDITIONS FOR UNUSED PINS ..........................................................................
MASK OPTION SELECTION .................................................................................................................
8
8
10
11
14
15
4.
MEMORY CONFIGURATION
..........................................................................................................
16
5.
PERIPHERAL HARDWARE FUNCTIONS
........................................................................................
5.1
5.2
5.3
5.4
5.5
5.6
5.7
5.8
5.9
5.10
PORT ......................................................................................................................................................
CLOCK GENERATOR CIRCUIT .............................................................................................................
CLOCK OUTPUT CIRCUIT .....................................................................................................................
BASIC INTERVAL TIMER ......................................................................................................................
WATCH TIMER ......................................................................................................................................
TIMER/EVENT COUNTER .....................................................................................................................
TIMER/PULSE GENERATOR .................................................................................................................
SERIAL INTERFACE ...............................................................................................................................
A/D CONVERTER ...................................................................................................................................
BIT SEQUENTIAL BUFFER ...................................................................................................................
19
19
20
21
22
23
23
25
26
30
31
6.
INTERRUPT FUNCTIONS
................................................................................................................
31
7.
STANDBY FUNCTIONS
...................................................................................................................
33
8.
RESET FUNCTIONS
.........................................................................................................................
34
9.
INSTRUCTION SET
..........................................................................................................................
36
10. ELECTRICAL SPECIFICATIONS
.......................................................................................................
44
11. PACKAGE DRAWINGS
....................................................................................................................
57
12. RECOMMENDED SOLDERING CONDITIONS
................................................................................
4
58
µ
PD75512(A)
APPENDIX A. FUNCTIONAL DIFFERENCES AMONG
µ
PD755XX(A) SERIES PRODUCTS
.............
APPENDIX B. DEVELOPMENT TOOLS
................................................................................................
59
60
APPENDIX C. RELATED DOCUMENTS ................................................................................................
61
5
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