CAT28C64BN-20 datasheet, PDF - EEWORLD Datasheet

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CAT28C64BN-20: Description64K-Bit CMOS PARALLEL EEPROM; Categorystorage storage; File Size73KB，13 Pages; ManufacturerON Semiconductor; Websitehttp://www.onsemi.cn

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CAT28C64BN-20 Overview

64K-Bit CMOS PARALLEL EEPROM

CAT28C64BN-20 Parametric

Parameter Name	Attribute value
Is it lead-free?	Contains lead
Is it Rohs certified?	incompatible
Maker	ON Semiconductor
Parts packaging code	QFJ
package instruction	QCCJ,
Contacts	32
Reach Compliance Code	compliant
ECCN code	EAR99
Maximum access time	200 ns
Other features	AUTOMATIC WRITE; PAGE WRITE
JESD-30 code	R-PQCC-J32
JESD-609 code	e0
length	13.97 mm
memory density	65536 bit
Memory IC Type	EEPROM
memory width	8
Humidity sensitivity level	3
Number of functions	1
Number of terminals	32
word count	8192 words
character code	8000
Operating mode	ASYNCHRONOUS
Maximum operating temperature	70 °C
Minimum operating temperature
organize	8KX8
Package body material	PLASTIC/EPOXY
encapsulated code	QCCJ
Package shape	RECTANGULAR
Package form	CHIP CARRIER
Parallel/Serial	PARALLEL
Peak Reflow Temperature (Celsius)	240
Programming voltage	5 V
Certification status	Not Qualified
Maximum seat height	3.55 mm
Maximum supply voltage (Vsup)	5.5 V
Minimum supply voltage (Vsup)	4.5 V
Nominal supply voltage (Vsup)	5 V
surface mount	YES
technology	CMOS
Temperature level	COMMERCIAL
Terminal surface	TIN LEAD
Terminal form	J BEND
Terminal pitch	1.27 mm
Terminal location	QUAD
Maximum time at peak reflow temperature	30
width	11.43 mm
Base Number Matches	1

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CAT28C64B

64K-Bit CMOS PARALLEL EEPROM

FEATURES

Fast read access times:

Commercial, industrial and automotive

– 90/120/150ns

Low power CMOS dissipation:

temperature ranges

Automatic page write operation:

– Active: 25 mA max.

– Standby: 100

A max.

Simple write operation:

– 1 to 32 bytes in 5ms

– Page load timer

End of write detection:

– On-chip address and data latches

– Self-timed write cycle with auto-clear

Fast write cycle time:

– Toggle bit

–

DATA

polling

100,000 program/erase cycles

100 year data retention

– 5ms max.

CMOS and TTL compatible I/O

Hardware and software write protection

DESCRIPTION

The CAT28C64B is a fast, low power, 5V-only CMOS

Parallel EEPROM organized as 8K x 8-bits. It requires a

simple interface for in-system programming. On-chip

address and data latches, self-timed write cycle with

auto-clear and V

power up/down write protection

eliminate additional timing and protection hardware.

DATA

Polling and Toggle status bits signal the start and

end of the self-timed write cycle. Additionally, the

CAT28C64B features hardware and software write

protection.

The CAT28C64B is manufactured using Catalyst’s

advanced CMOS floating gate technology. It is designed

to endure 100,000 program/erase cycles and has a data

retention of 100 years. The device is available in JEDEC-

approved 28-pin DIP, TSOP, SOIC, or, 32-pin PLCC

package .

BLOCK DIAGRAM

A5–A12

ADDR. BUFFER

& LATCHES

INADVERTENT

WRITE

PROTECTION

ROW

DECODER

8,192 x 8

EEPROM

ARRAY

32 BYTE PAGE

VCC

HIGH VOLTAGE

GENERATOR

CONTROL

LOGIC

I/O BUFFERS

TIMER

DATA POLLING

AND

TOGGLE BIT

COLUMN

DECODER

I/O0–I/O7

A0–A4

ADDR. BUFFER

& LATCHES

Characteristics subject to change without notice

Doc. No. MD-1011, Rev. I

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