DATA SHEET
MOS INTEGRATED CIRCUIT
µ
PD75116H,75117H
4-BIT SINGLE-CHIP MICROCOMPUTER
DESCRIPTION
The
µ
PD75117H is a 75X Series 4-bit single-chip microcomputer.
The
µ
PD75117H is a product which has the same functions as those of the
µ
PD751××F, with the minimum
operating voltage reduced from the previous 2.7 V to 1.8 V, and achieving 1.91
µ
s operation at 1.8 V. There-
fore, it facilitates low-voltage operation for a set requiring high-speed operation.
Functions are described in detail in the following User’s Manual, which should be read when carrying out
design work.
µ
PD75117H User’s Manual : IEU-799
FEATURES
•
Memory capacity
ROM : 24448
×
8 bits (
µ
PD75117H)
: 16256
×
8 bits (
µ
PD75116H)
RAM : 768
×
4 bits
•
High-speed low voltage operation
Minimum instruction execution time :
•
Operating voltage range
•
Input/output ports : 58
•
Timer/counter
: 3 channels
• Timer/event counter
×
2 channels
• Basic interval timer
×
1 channel
•
8-bit serial interface on chip
•
Programmable threshold port
•
On-chip PROM product available
:
1.91
µ
s (V
DD
= 1.8 V)
0.95
µ
s (V
DD
= 2.7 V)
1.8 to 5.5 V (T
a
= –40 to +60
°C)
5
:
:
4-bit resolution
×
4 channels
µ
PD75P117H (One-time PROM)
APPLICATIONS
Cordless telephone subsets, portable radio equipment, pager, etc.
"Unless there are any particular functional differences, the
µPD75117H
is described in this document as a
representative product."
The information in this document is subject to change without notice.
Document No. IC-3120
(O.D.No. IC-8502)
Date Published May 1994P
Printed in Japan
The mark
5
shows major revised points.
© NEC Corporation 1994
µ
PD75116H,75117H
ORDERING INFORMATION
Ordering Code
Package
64-pin
64-pin
64-pin
64-pin
plastic
plastic
plastic
plastic
QFP
QFP
QFP
QFP
(
(
(
(
14
12
14
12
mm)
mm)
mm)
mm)
Quality Grade
Standard
Standard
Standard
Standard
µ
PD75116HGC-×××-AB8
µ
PD75116HGK-×××-8A8
µ
PD75117HGC-×××-AB8
µ
PD75117HGK-×××-8A8
Remarks
×××:
ROM code number
OVERVIEW OF FUNCTIONS
Item
Basic instructions
Instruction cycle
ROM
On-chip memory
RAM
General register
768
×
4 bits
4 bits
×
8
×
4 banks (memory mapping)
Total 58
• CMOS input pins
• CMOS input/output pins
43
0.95
µ
s, 1.91
µ
s, 15.3
µ
s (4.19 MHz operation)
3-stage switching capability
24448
×
8 bits (
µ
PD75117H), 16256
×
8 bits (
µ
PD75116H)
Contents
Input/output port
: 10
: 32 (pins with LED direct drive
capability*1)
• N-ch open-drain input/output pins
: 12 (pins with LED direct drive
capability*2)
(A pull-up resistor can be incorporated bit-wise.)
• Comparator input pins (4-bit precision) : 4
• 8-bit timer/event counter
×
2
• 8-bit basic interval timer (watchdog timer applicable)
• 8 bits
• LSB-first/MSB-first switchable
• 2 transfer modes (transmission/reception and dedicated reception modes)
• External :
• Internal :
• External :
3
4
2
Timer/counter
Serial interface
Vectored interrupt
Test input
Standby
• STOP/HALT mode
•
•
•
•
Various bit manipulation instructions (set, reset, test, Boolean operation)
8-bit data transfer, comparison, operation, increment/decrement instructions
1-byte relative branch instruction
GETI instruction that can implement arbitrary 2-byte/3-byte instructions with 1
byte
Instruction set
Others
• Bit manipulation memory (bit sequential buffer: 16 bits) on chip
• 64-pin plastic QFP ( 14 mm)
• 64-pin plastic QFP ( 12 mm)
5
Package
5
* 1.
When V
DD
= 5 V, I
OL
= 15 mA.
5
2.
When V
DD
= 5 V, I
OL
= 10 mA.
2
µ
PD75116H,75117H
DIFFERENCES BETWEEN
µ
PD75116H AND
µ
PD75117H
Item
ROM
5
µ
PD75117H
µ
PD75116H
16256
×
8 bits
(Mask ROM)
768
×
4 bits
SBS register
No
Memory bank 0
2-byte stack
3 machine cycles
2 machine cycles
24448
×
8 bits
(Mask ROM)
RAM
Stack
Stack area
Stack operation when subroutine call
instruction is executed
CALL instruction machine cycle
CALLF instruction machine cycle
BRA instruction
CALLA instruction
MOVT XA, BCDE
MOVT XA, BCXA
BR BCDE
BR BCXA
Yes
Memory banks 0, 1, 2
3-byte stack
4 machine cycles
3 machine cycles
Undefined operation
Normal operation
3
µ
PD75116H,75117H
CONTENTS
1.
2.
3.
PIN CONFIGURATION (TOP VIEW) ......................................................................................................
BLOCK DIAGRAM ...................................................................................................................................
PIN FUNCTIONS .....................................................................................................................................
3.1
3.2
3.3
3.4
6
8
9
PORT PINS ....................................................................................................................................................... 9
OTHER PINS ..................................................................................................................................................... 10
PIN INPUT/OUTPUT CIRCUITS ..................................................................................................................... 11
RECOMMENDED CONNECTION OF UNUSED PINS ................................................................................... 12
4.
5.
MEMORY CONFIGURATION ................................................................................................................. 13
PERIPHERAL HARDWARE FUNCTIONS ............................................................................................... 18
5.1
5.2
5.3
5.4
5.5
5.6
5.7
5.8
PORT ................................................................................................................................................................. 18
CLOCK GENERATOR ....................................................................................................................................... 19
CLOCK OUTPUT CIRCUIT ............................................................................................................................... 20
BASIC INTERVAL TIMER ................................................................................................................................
TIMER/EVENT COUNTER ...............................................................................................................................
SERIAL INTERFACE .........................................................................................................................................
PROGRAMMABLE THRESHOLD PORT (ANALOG INPUT PORT) ..............................................................
21
21
23
25
BIT SEQUENTIAL BUFFER ............................................................................................................................. 26
6.
7.
8.
9.
INTERRUPT FUNCTION ........................................................................................................................ 27
STANDBY FUNCTION ............................................................................................................................ 29
RESET FUNCTION .................................................................................................................................. 30
INSTRUCTION SET ................................................................................................................................. 33
10. APPLICATION EXAMPLE ....................................................................................................................... 43
10.1 CORDLESS TELEPHONE (SUBSET) .............................................................................................................. 43
10.2 DISPLAY PAGER .............................................................................................................................................. 44
11. MASK OPTION SELECTION ................................................................................................................... 45
12. ELECTRICAL SPECIFICATIONS ............................................................................................................. 46
13. PACKAGE INFORMATION ..................................................................................................................... 57
14. RECOMMENDED SOLDERING CONDITIONS ...................................................................................... 59
APPENDIX A. FUNCTIONAL DIFFERENCES AMONG
µ
PD751×× SERIES PRODUCTS ......................... 60
4
µ
PD75116H,75117H
APPENDIX B. DEVELOPMENT TOOLS ........................................................................................................ 62
APPENDIX C. RELATED DOCUMENTS ........................................................................................................ 63
5
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