DS2407 datasheet, PDF - EEWORLD Datasheet

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DS2407: DescriptionSRAM, MOS,; Categorystorage storage; File Size1MB，33 Pages; ManufacturerMaxim; Websitehttps://www.maximintegrated.com/en.html

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DS2407 Overview

SRAM, MOS,

DS2407 Parametric

Parameter Name	Attribute value
Is it Rohs certified?	incompatible
Maker	Maxim
Parts packaging code	TO-92
package instruction	, SIP3,.1,50
Contacts	3
Reach Compliance Code	not_compliant
JESD-609 code	e0
Number of terminals	3
Maximum operating temperature	85 °C
Minimum operating temperature	-40 °C
Package body material	PLASTIC/EPOXY
Encapsulate equivalent code	SIP3,.1,50
power supply	3/5 V
Certification status	Not Qualified
surface mount	NO
technology	MOS
Temperature level	INDUSTRIAL
Terminal surface	Tin/Lead (Sn/Pb)
Terminal pitch	1.27 mm
Terminal location	SINGLE

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DS2407

Dual Addressable Switch Plus

1-kbit Memory

www.dalsemi.com

FEATURES

Open drain PIO pins are controlled and their

logic level can be determined over 1-Wire

bus for closed-loop control

Dual Channel operation (TSOC package)

PIO pin channel. A sink capability of 50 mA

at 0.4V with soft turn-on; channel B 8 mA at

0.4V

Maximum operating voltage of 13V at PIO-

A, 6.5V at PIO–B

1024 bits user-programmable OTP EPROM

7 bytes of user-programmable status memory

to control the device

Multiple DS2407s can be identified on a

common 1-Wire bus and be turned on or off

independently of other devices on the bus

Unique, factory-lasered and tested 64-bit

registration number (8-bit family code + 48-

bit serial number + 8-bit CRC tester) assures

error-free selection and absolute identity

because no two parts are alike

On-chip CRC16 generator allows detection

of data transfer errors

Built-in multidrop controller ensures

compatibility with other MicroLAN

products

Reduces control, address, data, programming

and power to a single data pin

Directly connects to a single port pin of a

microprocessor and communicates at up to

16.3k bits/s

Low cost TO-92 or 6-pin TSOC surface

mount package

1-Wire communication operates over a wide

voltage range of 2.8V to 6.0V from -40°C to

+85°C

Supports Conditional Search with user-

programmable condition

bondout for optional external supply to

the device (TSOC package only)

1 of 33

Hidden Mode; the device will respond only

to a Match ROM command or a Conditional

Search when in this mode.

PIN ASSIGNMENT

To- 92

DALLAS

DS2407

TOP VIEW

3.7 X 4.0 X 1.5 mm

SIDE VIEW

See Mech. Drawings

Section

BOTTOM VIEW

See Mech. Drawings

Section

PIN DESCRIPTION

Pin 1

Pin 2

Pin 3

Pin 4

Pin 5

Pin 6

TO-92

Ground

Data

PIO-A

––––

TSOC

Ground

Data

PIO-A

PIO-B

012501

DS2407

ORDERING INFORMATION

DS2407

DS2407P

DS2407T

DS2407V

DS2407X

TO-92 package

6-pin TSOC package

Tape & Reel version of DS2407

Tape & Reel version of DS2407P

Chip Scale Pkg., Tape & Reel

ADDRESSABLE SWITCH

DESCRIPTION

The DS2407 Dual Addressable Switch Plus 1-kbit Memory is a pair of open drain N-channel transistors

that can be turned on or off via the 1-Wire bus. Alternatively, either open drain output can serve as a logic

input that can be monitored via the same 1-Wire bus. In addition, the device has 1024 bits of EPROM to

store relevant information such as switch function, physical location, etc. The device is addressed by

matching its individual 64-bit factory-lasered registration number. The 64-bit number consists of an 8-bit

family code, a unique 48-bit serial number, and an 8-bit cyclic redundancy check. Communication with

the DS2407 follows the standard Dallas Semiconductor 1-Wire protocol and can be accomplished with a

single port pin of a microcontroller. Multiple DS2407 devices can reside on a common 1-Wire bus

creating a MicroLAN. The network controller circuitry is embedded within the chip including a search

algorithm to determine the identity of each DS2407 on the network. The open drain outputs (PIO pins) for

each DS2407 on the MicroLAN can be independently switched on or off whether there is one or many

devices sharing the same 1-Wire bus. The logic level of the PIO pins for each device on the MicroLAN

can also be individually sensed and reported to the bus master. The device also supports a Conditional

Search command to identify and access devices that qualify for certain user-specified conditions.

Qualification may be the status of a PIO-pin, the state of the output transistor or a latched activity flag.

OVERVIEW

The DS2407 Dual Addressable Switch Plus Memory provides a means for assigning an electronically

readable identification to a particular node or location with additional control capability provided by two

open drain N-channel MOSFETs that can be remotely switched and sensed via communication over the

1-Wire bus (Figure 1). The DS2407 contains a factory-lasered registration number that includes a unique

48-bit serial number, an 8-bit CRC, and an 8-bit family code (12h). The 64-bit ROM portion of the

DS2407 not only creates an absolutely unique electronic identification for the device itself but also is a

means to locate and obtain or change the state of the switches that are associated with the 64-bit ROM.

The device derives its power entirely from the 1-Wire bus by storing energy on an internal capacitor

during periods of time when the signal line is high and continues to operate off of this “parasite” power

source during the low times of the 1-Wire line until it returns high to replenish the parasite (capacitor)

supply. For applications in feeder-networks where the low-times of the 1-Wire line may be very long, the

pin may be connected to an external voltage supply to operate the device.

2 of 33

DS2407

The DS2407 uses the standard Dallas Semiconductor 1-Wire protocol for data transfers (Figure 2), with

all data being read and written least significant bit first. Communication to and from the DS2407 requires

a single bi-directional line that is typically a port pin of a microcontroller. The 1-Wire bus master

(microcontroller) must first issue one of five ROM function commands: 1) Read ROM, 2) Match ROM,

3) Search ROM, 4) Skip ROM, or 5) Conditional Search ROM. These commands operate on the 64-bit

lasered ROM portion of each device and can singulate a specific device if many are present on the 1-Wire

line as well as indicate to the bus master how many and what type of each device is present. After a ROM

function command is successfully executed, the open drain outputs can be switched or sensed, or the

contents of the memory can be read or written via the 1-Wire bus. Writing the 1024 bits of data memory

or writing to the EPROM sections of the status memory requires a 12-volt programming pulse. When

programming the DS2407, only EPROM-based devices are allowed to be present on the 1-Wire line.

64-BIT LASERED ROM

Each DS2407 contains a unique ROM code that is 64 bits long. The first 8 bits are a 1-Wire family code.

The next 48 bits are a unique serial number. The last eight bits are a CRC of the first 56 bits. (See Figure

3.) The 1-Wire CRC of the lasered ROM is generated using the polynomial X

+ X

+ 1. Additional

information about the Dallas Semiconductor 1-Wire Cyclic Redundancy Check is available in the Book

of DS19xx iButton Standards. The 64-bit ROM and ROM Function Control section allow the DS2407 to

operate as a 1-Wire device and follow the 1-Wire protocol detailed in the section “1-Wire Bus System.”

The functions required to read and write the data and status memory of the DS2407 and to access the

switches are not accessible until the ROM function protocol has been satisfied. This protocol is described

in the ROM functions flow chart (Figure 12). The 1-Wire bus master must first provide one of the five

ROM function commands. After a ROM function sequence has been successfully executed, the bus

master may then provide any one of the memory function commands specific to the DS2407 (Figure 6).

MEMORY

The DS2407 contains two memory sections, Data Memory and Status Memory. The data memory

consists of 1024 bits of one-time programmable EPROM organized as 4 pages of 32 bytes each. The size

of the device’s status memory is 8 bytes. The first seven bytes of status memory (addresses 0 to 6) are

also realized as EPROM. The eighth byte (address 7) consists of SRAM cells which shadow the contents

of address 6 each time the device powers up. The complete memory map is shown in Figure 4. The 8-bit

scratchpad is an additional register that acts as a buffer when writing the memory. Data is first written to

the scratchpad and then verified by reading a 16-bit CRC from the DS2407 that confirms proper receipt

of the data and address. If the buffer contents are correct, a programming pulse should be applied and the

byte of data will be written into the selected address in memory. This process insures data integrity when

programming the memory. The details for reading and programming the EPROM portions of the DS2407

are given in the Memory Function Commands section.

3 of 33

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