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CAT25020GVI-1.8REV-B

Description
EEPROM, 256X8, Serial, CMOS, PDSO8, ROHS COMPLIANT, SOIC-8
Categorystorage    storage   
File Size115KB,11 Pages
ManufacturerCatalyst
Websitehttp://www.catalyst-semiconductor.com/
Environmental Compliance  
Download Datasheet Parametric View All

CAT25020GVI-1.8REV-B Overview

EEPROM, 256X8, Serial, CMOS, PDSO8, ROHS COMPLIANT, SOIC-8

CAT25020GVI-1.8REV-B Parametric

Parameter NameAttribute value
Is it lead-free?Lead free
Is it Rohs certified?conform to
MakerCatalyst
Parts packaging codeSOIC
package instructionSOP,
Contacts8
Reach Compliance Codeunknown
ECCN codeEAR99
Maximum clock frequency (fCLK)1 MHz
JESD-30 codeR-PDSO-G8
JESD-609 codee4
memory density2048 bit
Memory IC TypeEEPROM
memory width8
Number of functions1
Number of terminals8
word count256 words
character code256
Operating modeSYNCHRONOUS
Maximum operating temperature85 °C
Minimum operating temperature-40 °C
organize256X8
Package body materialPLASTIC/EPOXY
encapsulated codeSOP
Package shapeRECTANGULAR
Package formSMALL OUTLINE
Parallel/SerialSERIAL
Peak Reflow Temperature (Celsius)260
Certification statusNot Qualified
Serial bus typeSPI
Maximum supply voltage (Vsup)5.5 V
Minimum supply voltage (Vsup)1.8 V
Nominal supply voltage (Vsup)5 V
surface mountYES
technologyCMOS
Temperature levelINDUSTRIAL
Terminal surfaceNICKEL PALLADIUM GOLD
Terminal formGULL WING
Terminal locationDUAL
Maximum time at peak reflow temperature40
Maximum write cycle time (tWC)5 ms
CAT25010/20/40
1K/2K/4K SPI Serial CMOS EEPROM
FEATURES
s
10 MHz SPI compatible
s
1.8 to 5.5 volt operation
s
Hardware and software protection
s
Low power CMOS technology
s
SPI modes (0,0 & 1,1)
s
Commercial, industrial, automotive and extended
s
1,000,000 program/erase cycles
s
100 year data retention
s
Self-timed write cycle
s
8-Pin DIP/SOIC, 8-Pin TSSOP and 8-Pin MSOP
s
16-byte page write buffer
s
Block write protection
temperature ranges
– Protect 1/4, 1/2 or all of EEPROM array
DESCRIPTION
The CAT25010/20/40 is a 1K/2K/4K Bit SPI Serial
CMOS EEPROM internally organized as 128x8/256x8/
512x8 bits. Catalyst’s advanced CMOS Technology
substantially reduces device power requirements. The
CAT25010/20/40 features a 16-byte page write buffer.
The device operates via the SPI bus serial interface and
is enabled though a Chip Select (CS). In addition to the
Chip Select, the clock input (SCK), data in (SI) and data
out (SO) are required to access the device. The
HOLD
pin may be used to suspend any serial communication
without resetting the serial sequence. The CAT25010/
20/40 is designed with software and hardware write
protection features including Block Write protection. The
device is available in 8-pin DIP, 8-pin SOIC, 8-pin MSOP
and 8-pin TSSOP packages.
PIN CONFIGURATION
SOIC Package (S, V, GV)
CS
SO
WP
VSS
1
2
3
4
8
7
6
5
VCC
HOLD
SCK
SI
BLOCK DIAGRAM
MSOP Package (R, Z, GZ)
CS
SO
WP
VSS
1
2
3
4
8
7
6
5
VCC
HOLD
SCK
SENSE AMPS
SHIFT REGISTERS
SI
DIP Package (P, L, GL)
CS
SO
WP
VSS
1
2
3
4
8
7
6
5
VCC
HOLD
SCK
SI
TSSOP Package (U, Y, GY)
CS
SO
WP
VSS
1
2
3
4
8
7
6
5
VCC
HOLD
SCK
SI
WORD ADDRESS
BUFFERS
COLUMN
DECODERS
SO
SI
CS
WP
HOLD
SCK
I/O
CONTROL
SPI
CONTROL
LOGIC
BLOCK
PROTECT
LOGIC
CONTROL LOGIC
XDEC
E
2
PROM
ARRAY
PIN FUNCTIONS
Pin Name
SO
SCK
WP
V
CC
V
SS
CS
SI
HOLD
NC
Function
Serial Data Output
Serial Clock
Write Protect
+1.8V to +5.5V Power Supply
Ground
Chip Select
Serial Data Input
Suspends Serial Input
No Connect
DATA IN
STORAGE
HIGH VOLTAGE/
TIMING CONTROL
STATUS
REGISTER
25C128 F02
© 2005 by Catalyst Semiconductor, Inc.
Characteristics subject to change without notice
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