CAT25010VI-REV-C datasheet, PDF

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CAT25010VI-REV-C: DescriptionEEPROM, 128X8, Serial, CMOS, PDSO8, ROHS COMPLIANT, SOIC-8; Categorystorage storage; File Size115KB，11 Pages; ManufacturerCatalyst; Websitehttp://www.catalyst-semiconductor.com/; Environmental Compliance

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CAT25010VI-REV-C Overview

EEPROM, 128X8, Serial, CMOS, PDSO8, ROHS COMPLIANT, SOIC-8

CAT25010VI-REV-C Parametric

Parameter Name	Attribute value
Is it lead-free?	Lead free
Is it Rohs certified?	conform to
Maker	Catalyst
Parts packaging code	SOIC
package instruction	SOP,
Contacts	8
Reach Compliance Code	unknown
ECCN code	EAR99
Maximum clock frequency (fCLK)	5 MHz
JESD-30 code	R-PDSO-G8
JESD-609 code	e3
memory density	1024 bit
Memory IC Type	EEPROM
memory width	8
Number of functions	1
Number of terminals	8
word count	128 words
character code	128
Operating mode	SYNCHRONOUS
Maximum operating temperature	85 °C
Minimum operating temperature	-40 °C
organize	128X8
Package body material	PLASTIC/EPOXY
encapsulated code	SOP
Package shape	RECTANGULAR
Package form	SMALL OUTLINE
Parallel/Serial	SERIAL
Peak Reflow Temperature (Celsius)	260
Certification status	Not Qualified
Serial bus type	SPI
Maximum supply voltage (Vsup)	5.5 V
Minimum supply voltage (Vsup)	2.5 V
Nominal supply voltage (Vsup)	5 V
surface mount	YES
technology	CMOS
Temperature level	INDUSTRIAL
Terminal surface	MATTE TIN
Terminal form	GULL WING
Terminal location	DUAL
Maximum time at peak reflow temperature	40
Maximum write cycle time (tWC)	5 ms

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CAT25010/20/40

1K/2K/4K SPI Serial CMOS EEPROM

FEATURES

10 MHz SPI compatible

1.8 to 5.5 volt operation

Hardware and software protection

Low power CMOS technology

SPI modes (0,0 & 1,1)

Commercial, industrial, automotive and extended

1,000,000 program/erase cycles

100 year data retention

Self-timed write cycle

8-Pin DIP/SOIC, 8-Pin TSSOP and 8-Pin MSOP

16-byte page write buffer

Block write protection

temperature ranges

– Protect 1/4, 1/2 or all of EEPROM array

DESCRIPTION

The CAT25010/20/40 is a 1K/2K/4K Bit SPI Serial

CMOS EEPROM internally organized as 128x8/256x8/

512x8 bits. Catalyst’s advanced CMOS Technology

substantially reduces device power requirements. The

CAT25010/20/40 features a 16-byte page write buffer.

The device operates via the SPI bus serial interface and

is enabled though a Chip Select (CS). In addition to the

Chip Select, the clock input (SCK), data in (SI) and data

out (SO) are required to access the device. The

HOLD

pin may be used to suspend any serial communication

without resetting the serial sequence. The CAT25010/

20/40 is designed with software and hardware write

protection features including Block Write protection. The

device is available in 8-pin DIP, 8-pin SOIC, 8-pin MSOP

and 8-pin TSSOP packages.

PIN CONFIGURATION

SOIC Package (S, V, GV)

VSS

VCC

HOLD

SCK

BLOCK DIAGRAM

MSOP Package (R, Z, GZ)

VSS

VCC

HOLD

SCK

SENSE AMPS

SHIFT REGISTERS

DIP Package (P, L, GL)

VSS

VCC

HOLD

SCK

TSSOP Package (U, Y, GY)

VSS

VCC

HOLD

SCK

WORD ADDRESS

BUFFERS

COLUMN

DECODERS

HOLD

SCK

I/O

CONTROL

SPI

CONTROL

LOGIC

BLOCK

PROTECT

LOGIC

CONTROL LOGIC

XDEC

PROM

ARRAY

PIN FUNCTIONS

Pin Name

SCK

HOLD

Function

Serial Data Output

Serial Clock

Write Protect

+1.8V to +5.5V Power Supply

Ground

Chip Select

Serial Data Input

Suspends Serial Input

No Connect

DATA IN

STORAGE

HIGH VOLTAGE/

TIMING CONTROL

STATUS

25C128 F02

Characteristics subject to change without notice

Doc. No. 1006, Rev. M

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