IS42S16800F-5BLI datasheet, PDF

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IS42S16800F-5BLI: DescriptionSynchronous DRAM, 8MX16, 5ns, CMOS, PBGA54, 8 X 8 MM, 0.80 MM PITCH, LEAD FREE, TFBGA-54; Categorystorage storage; File Size883KB，63 Pages; ManufacturerIntegrated Silicon Solution ( ISSI ); Environmental Compliance

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IS42S16800F-5BLI Overview

Synchronous DRAM, 8MX16, 5ns, CMOS, PBGA54, 8 X 8 MM, 0.80 MM PITCH, LEAD FREE, TFBGA-54

IS42S16800F-5BLI Parametric

Parameter Name	Attribute value
Is it Rohs certified?	conform to
Maker	Integrated Silicon Solution ( ISSI )
Parts packaging code	BGA
package instruction	TFBGA, BGA54,9X9,32
Contacts	54
Reach Compliance Code	compliant
ECCN code	EAR99
access mode	FOUR BANK PAGE BURST
Maximum access time	5 ns
Other features	AUTO/SELF REFRESH
Maximum clock frequency (fCLK)	200 MHz
I/O type	COMMON
interleaved burst length	1,2,4,8
JESD-30 code	S-PBGA-B54
length	8 mm
memory density	134217728 bit
Memory IC Type	SYNCHRONOUS DRAM
memory width	16
Number of functions	1
Number of ports	1
Number of terminals	54
word count	8388608 words
character code	8000000
Operating mode	SYNCHRONOUS
Maximum operating temperature	85 °C
Minimum operating temperature	-40 °C
organize	8MX16
Output characteristics	3-STATE
Package body material	PLASTIC/EPOXY
encapsulated code	TFBGA
Encapsulate equivalent code	BGA54,9X9,32
Package shape	SQUARE
Package form	GRID ARRAY, THIN PROFILE, FINE PITCH
power supply	3.3 V
Certification status	Not Qualified
refresh cycle	4096
Maximum seat height	1.2 mm
self refresh	YES
Continuous burst length	1,2,4,8,FP
Maximum standby current	0.002 A
Maximum slew rate	0.13 mA
Maximum supply voltage (Vsup)	3.6 V
Minimum supply voltage (Vsup)	3 V
Nominal supply voltage (Vsup)	3.3 V
surface mount	YES
technology	CMOS
Temperature level	INDUSTRIAL
Terminal form	BALL
Terminal pitch	0.8 mm
Terminal location	BOTTOM
width	8 mm

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IS42/45S81600F

IS42/45S16800F

16M x 8, 8M x16

128Mb SYNCHRONOUS DRAM

ADVANCED INFORMATION

FEBRUARY 2011

FEATURES

• Clock frequency: 200, 166, 143 MHz

• Fully synchronous; all signals referenced to a

positive clock edge

• Internal bank for hiding row access/precharge

• Power supply

ddq

IS42/45S81600F 3.3V 3.3V

IS42/45S16800F 3.3V 3.3V

• LVTTL interface

• Programmable burst length

– (1, 2, 4, 8, full page)

• Programmable burst sequence:

Sequential/Interleave

• Auto Refresh (CBR)

• Self Refresh

• 4096 refresh cycles every 16 ms (A2 grade) or

64 ms (Commercial, Industrial, A1 grade)

• Random column address every clock cycle

• Programmable CAS latency (2, 3 clocks)

• Burst read/write and burst read/single write

operations capability

• Burst termination by burst stop and precharge

command

• Temperature Ranges:

Commercial (0

C to +70

Industrial (-40

C to +85

Automotive, A1 (-40

C to +85

Automotive, A2 (-40

C to +105

OVERVIEW

ISSI

's 128Mb Synchronous DRAM achieves high-speed

data transfer using pipeline architecture. All inputs and

outputs signals refer to the rising edge of the clock input.

The 128Mb SDRAM is organized as follows.

IS42/45S81600F IS42/45S16800F

4M x8 x4 Banks

54-pin TSOPII

2M x16 x4 Banks

54-pin TSOPII

54-ball BGA

KEY TIMING PARAMETERS

Parameter

Clk Cycle Time

CAS Latency = 3

CAS Latency = 2

Clk Frequency

CAS Latency = 3

CAS Latency = 2

Access Time from Clock

CAS Latency = 3

CAS Latency = 2

-5

200

100

6.5

-6

166

100

5.4

6.5

-7

7.5

143

133

5.4

Unit

Mhz

out notice. ISSI assumes no liability arising out of the application or use of any information, products or services described herein. Customers are advised to obtain

the latest version of this device specification before relying on any published information and before placing orders for products.

Integrated Silicon Solution, Inc. does not recommend the use of any of its products in life support applications where the failure or malfunction of the product can reasonably be

expected to cause failure of the life support system or to significantly affect its safety or effectiveness. Products are not authorized for use in such applications unless Integrated

Silicon Solution, Inc. receives written assurance to its satisfaction, that:

a.) the risk of injury or damage has been minimized;

b.) the user assume all such risks; and

c.) potential liability of Integrated Silicon Solution, Inc is adequately protected under the circumstances

Integrated Silicon Solution, Inc. — www.issi.com

Rev. 00A

11/16/2010

IS42S16800F-5BLI Related Products

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Description	Synchronous DRAM, 8MX16, 5ns, CMOS, PBGA54, 8 X 8 MM, 0.80 MM PITCH, LEAD FREE, TFBGA-54	Synchronous DRAM, 16MX8, 5ns, CMOS, PDSO54, 0.400 INCH, LEAD FREE, TSOP2-54	Synchronous DRAM, 8MX16, 5ns, CMOS, PDSO54, 0.400 INCH, LEAD FREE, TSOP2-54	Synchronous DRAM, 8MX16, 5ns, CMOS, PBGA54, 8 X 8 MM, 0.80 MM PITCH, LEAD FREE, TFBGA-54	Synchronous DRAM, 16MX8, 5.4ns, CMOS, PDSO54, 0.400 INCH, LEAD FREE, TSOP2-54	Synchronous DRAM, 16MX8, 5ns, CMOS, PDSO54, 0.400 INCH, LEAD FREE, TSOP2-54	Synchronous DRAM, 16MX8, 5.4ns, CMOS, PDSO54, 0.400 INCH, LEAD FREE, TSOP2-54	Synchronous DRAM, 16MX8, 5.4ns, CMOS, PDSO54, 0.400 INCH, LEAD FREE, TSOP2-54
Is it Rohs certified?	conform to	conform to	conform to	conform to	conform to	conform to	conform to	conform to
Parts packaging code	BGA	TSOP2	TSOP2	BGA	TSOP2	TSOP2	TSOP2	TSOP2
package instruction	TFBGA, BGA54,9X9,32	TSOP2, TSOP54,.46,32	TSOP2, TSOP54,.46,32	TFBGA, BGA54,9X9,32	TSOP2, TSOP54,.46,32	TSOP2, TSOP54,.46,32	TSOP2, TSOP54,.46,32	TSOP2, TSOP54,.46,32
Contacts	54	54	54	54	54	54	54	54
Reach Compliance Code	compliant	compliant	compliant	compliant	compliant	compli	compli	compli
ECCN code	EAR99	EAR99	EAR99	EAR99	EAR99	EAR99	EAR99	EAR99
access mode	FOUR BANK PAGE BURST	FOUR BANK PAGE BURST	FOUR BANK PAGE BURST	FOUR BANK PAGE BURST	FOUR BANK PAGE BURST	FOUR BANK PAGE BURST	FOUR BANK PAGE BURST	FOUR BANK PAGE BURST
Maximum access time	5 ns	5 ns	5 ns	5 ns	5.4 ns	5 ns	5.4 ns	5.4 ns
Other features	AUTO/SELF REFRESH	AUTO/SELF REFRESH	AUTO/SELF REFRESH	AUTO/SELF REFRESH	AUTO/SELF REFRESH	AUTO/SELF REFRESH	AUTO/SELF REFRESH	AUTO/SELF REFRESH
Maximum clock frequency (fCLK)	200 MHz	200 MHz	200 MHz	200 MHz	166 MHz	200 MHz	143 MHz	143 MHz
I/O type	COMMON	COMMON	COMMON	COMMON	COMMON	COMMON	COMMON	COMMON
interleaved burst length	1,2,4,8	1,2,4,8	1,2,4,8	1,2,4,8	1,2,4,8	1,2,4,8	1,2,4,8	1,2,4,8
JESD-30 code	S-PBGA-B54	R-PDSO-G54	R-PDSO-G54	S-PBGA-B54	R-PDSO-G54	R-PDSO-G54	R-PDSO-G54	R-PDSO-G54
length	8 mm	22.22 mm	22.22 mm	8 mm	22.22 mm	22.22 mm	22.22 mm	22.22 mm
memory density	134217728 bit	134217728 bit	134217728 bit	134217728 bit	134217728 bit	134217728 bi	134217728 bi	134217728 bi
Memory IC Type	SYNCHRONOUS DRAM	SYNCHRONOUS DRAM	SYNCHRONOUS DRAM	SYNCHRONOUS DRAM	SYNCHRONOUS DRAM	SYNCHRONOUS DRAM	SYNCHRONOUS DRAM	SYNCHRONOUS DRAM
memory width	16	8	16	16	8	8	8	8
Number of functions	1	1	1	1	1	1	1	1
Number of ports	1	1	1	1	1	1	1	1
Number of terminals	54	54	54	54	54	54	54	54
word count	8388608 words	16777216 words	8388608 words	8388608 words	16777216 words	16777216 words	16777216 words	16777216 words
character code	8000000	16000000	8000000	8000000	16000000	16000000	16000000	16000000
Operating mode	SYNCHRONOUS	SYNCHRONOUS	SYNCHRONOUS	SYNCHRONOUS	SYNCHRONOUS	SYNCHRONOUS	SYNCHRONOUS	SYNCHRONOUS
Maximum operating temperature	85 °C	70 °C	70 °C	70 °C	85 °C	85 °C	85 °C	105 °C
Minimum operating temperature	-40 °C	-	-	-	-40 °C	-40 °C	-40 °C	-40 °C
organize	8MX16	16MX8	8MX16	8MX16	16MX8	16MX8	16MX8	16MX8
Output characteristics	3-STATE	3-STATE	3-STATE	3-STATE	3-STATE	3-STATE	3-STATE	3-STATE
Package body material	PLASTIC/EPOXY	PLASTIC/EPOXY	PLASTIC/EPOXY	PLASTIC/EPOXY	PLASTIC/EPOXY	PLASTIC/EPOXY	PLASTIC/EPOXY	PLASTIC/EPOXY
encapsulated code	TFBGA	TSOP2	TSOP2	TFBGA	TSOP2	TSOP2	TSOP2	TSOP2
Encapsulate equivalent code	BGA54,9X9,32	TSOP54,.46,32	TSOP54,.46,32	BGA54,9X9,32	TSOP54,.46,32	TSOP54,.46,32	TSOP54,.46,32	TSOP54,.46,32
Package shape	SQUARE	RECTANGULAR	RECTANGULAR	SQUARE	RECTANGULAR	RECTANGULAR	RECTANGULAR	RECTANGULAR
Package form	GRID ARRAY, THIN PROFILE, FINE PITCH	SMALL OUTLINE, THIN PROFILE	SMALL OUTLINE, THIN PROFILE	GRID ARRAY, THIN PROFILE, FINE PITCH	SMALL OUTLINE, THIN PROFILE	SMALL OUTLINE, THIN PROFILE	SMALL OUTLINE, THIN PROFILE	SMALL OUTLINE, THIN PROFILE
power supply	3.3 V	3.3 V	3.3 V	3.3 V	3.3 V	3.3 V	3.3 V	3.3 V
Certification status	Not Qualified	Not Qualified	Not Qualified	Not Qualified	Not Qualified	Not Qualified	Not Qualified	Not Qualified
refresh cycle	4096	4096	4096	4096	4096	4096	4096	4096
Maximum seat height	1.2 mm	1.2 mm	1.2 mm	1.2 mm	1.2 mm	1.2 mm	1.2 mm	1.2 mm
self refresh	YES	YES	YES	YES	YES	YES	YES	YES
Continuous burst length	1,2,4,8,FP	1,2,4,8,FP	1,2,4,8,FP	1,2,4,8,FP	1,2,4,8,FP	1,2,4,8,FP	1,2,4,8,FP	1,2,4,8,FP
Maximum standby current	0.002 A	0.002 A	0.002 A	0.002 A	0.002 A	0.002 A	0.002 A	0.002 A
Maximum slew rate	0.13 mA	0.13 mA	0.13 mA	0.13 mA	0.12 mA	0.13 mA	0.1 mA	0.1 mA
Maximum supply voltage (Vsup)	3.6 V	3.6 V	3.6 V	3.6 V	3.6 V	3.6 V	3.6 V	3.6 V
Minimum supply voltage (Vsup)	3 V	3 V	3 V	3 V	3 V	3 V	3 V	3 V
Nominal supply voltage (Vsup)	3.3 V	3.3 V	3.3 V	3.3 V	3.3 V	3.3 V	3.3 V	3.3 V
surface mount	YES	YES	YES	YES	YES	YES	YES	YES
technology	CMOS	CMOS	CMOS	CMOS	CMOS	CMOS	CMOS	CMOS
Temperature level	INDUSTRIAL	COMMERCIAL	COMMERCIAL	COMMERCIAL	INDUSTRIAL	INDUSTRIAL	INDUSTRIAL	INDUSTRIAL
Terminal form	BALL	GULL WING	GULL WING	BALL	GULL WING	GULL WING	GULL WING	GULL WING
Terminal pitch	0.8 mm	0.8 mm	0.8 mm	0.8 mm	0.8 mm	0.8 mm	0.8 mm	0.8 mm
Terminal location	BOTTOM	DUAL	DUAL	BOTTOM	DUAL	DUAL	DUAL	DUAL
width	8 mm	10.16 mm	10.16 mm	8 mm	10.16 mm	10.16 mm	10.16 mm	10.16 mm
Maker	Integrated Silicon Solution ( ISSI )	Integrated Silicon Solution ( ISSI )	-	Integrated Silicon Solution ( ISSI )	Integrated Silicon Solution ( ISSI )	Integrated Silicon Solution ( ISSI )	Integrated Silicon Solution ( ISSI )	Integrated Silicon Solution ( ISSI )

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