EMVA12AA3-6.312M TR
Series
RoHS Compliant (Pb-free) 4 Pad 5mm x 7mm SMD
2.5Vdc LVCMOS Voltage Controlled MEMS Oscillator
Frequency Tolerance/Stability
±50ppm Maximum
Operating Temperature Range
-20°C to +70°C
RoHS
Pb
Packaging Options
Tape & Reel
EMVA12 A A 3 -6.312M TR
Nominal Frequency
6.312MHz
Absolute Pull Range
±80ppm Minimum
ELECTRICAL SPECIFICATIONS
Nominal Frequency
Frequency Tolerance/Stability
6.312MHz
±50ppm Maximum (Inclusive of all conditions: Calibration Tolerance at 25°C, Frequency Stability over the
Operating Temperature Range, Supply Voltage Change, Output Load Change, First Year Aging at 25°C,
260°C Reflow, Shock, and Vibration)
±1ppm Maximum First Year
-20°C to +70°C
2.5Vdc ±5%
13mA Maximum
90% of Vdd Minimum (IOH = -4mA)
10% of Vdd Maximum (IOL = +4mA)
2nSec Maximum (Measured from 20% to 80% of waveform)
50 ±5(%) (Measured at 50% of waveform)
15pF Maximum
CMOS
±80ppm Minimum (Inclusive of all conditions: Calibration Tolerance at 25°C, Frequency Stability over the
Operating Temperature Range, Supply Voltage Change, Output Load Change, Shock, Vibration, and First
Year Aging at 25°C over the Control Voltage (Vc).)
0.05Vdc to 1.7Vdc (Test Condition for APR)
0.0Vdc to 1.8Vdc
1% Maximum
Positive Transfer Characteristic
8kHz Typical, 5kHz Minimum (Measured at -3dB, Vc = 0.875Vdc)
250kOhms Minimum
10µA Maximum
-100dBc/Hz at offset of 10kHz, -115dBc/Hz at offset of 100kHz, -145dBc/Hz at offset of 1MHz, and -
154dBc/Hz at offset of 10MHz
3pSec Typical, 6pSec Maximum
20pSec Typical, 40pSec Maximum
0.8pSec Typical
0.6pSec Typical
10mSec Maximum
-55°C to +125°C
Aging at 25°C
Operating Temperature Range
Supply Voltage
Input Current
Output Voltage Logic High (Voh)
Output Voltage Logic Low (Vol)
Rise/Fall Time
Duty Cycle
Load Drive Capability
Output Logic Type
Absolute Pull Range
Control Voltage
Control Voltage Range
Linearity
Transfer Function
Modulation Bandwidth
Input Impedance
Input Leakage Current
Typical Phase Noise at Offsets
Period Jitter (RMS)
Period Jitter (pk-pk)
RMS Phase Jitter (Fj = 1.875MHz to
20MHz; Random)
RMS Phase Jitter (Fj = 900kHz to
7.5MHz; Random)
Start Up Time
Storage Temperature Range
ENVIRONMENTAL & MECHANICAL SPECIFICATIONS
ESD Susceptibility
Flammability
Mechanical Shock
Moisture Resistance
Moisture Sensitivity Level
Resistance to Soldering Heat
Resistance to Solvents
Solderability
MIL-STD-883, Method 3015, Class 2, HBM 2000V
UL94-V0
MIL-STD-883, Method 2002, Condition G, 30,000G
MIL-STD-883, Method 1004
J-STD-020, MSL 1
MIL-STD-202, Method 210, Condition K
MIL-STD-202, Method 215
MIL-STD-883, Method 2003 (Four I/O Pads on bottom of package only)
www.ecliptek.com | Specification Subject to Change Without Notice | Rev A 3/12/2011 | Page 1 of 6
EMVA12AA3-6.312M TR
ENVIRONMENTAL & MECHANICAL SPECIFICATIONS
Temperature Cycling
Thermal Shock
Vibration
MIL-STD-883, Method 1010, Condition B
MIL-STD-883, Method 1011, Condition B
MIL-STD-883, Method 2007, Condition A, 20G
MECHANICAL DIMENSIONS (all dimensions in millimeters)
PIN
CONNECTION
Control Voltage
Case Ground
Output
Supply Voltage
5.00
±0.15
0.85
±0.15
0.08
MAX
2
1.20 ±0.10 (x4)
2.1
3
R0.70 ±0.10
1.70
1
2
3
4
LINE MARKING
7.00
±0.15
5.08
±0.10
1
C0.25 ±0.10
2.60 ±0.15
A
4
1
XXXX or XXXXX
XXXX or XXXXX=Ecliptek
Manufacturing Lot Code
1.40
±0.10 (x4)
Note A: Center paddle is connected
internally to oscillator ground (Pad 2).
Suggested Solder Pad Layout
All Dimensions in Millimeters
2.0 (X4)
2.2 (X4)
2.88
Solder Land
(X4)
1.81
All Tolerances are ±0.1
www.ecliptek.com | Specification Subject to Change Without Notice | Rev A 3/12/2011 | Page 2 of 6
EMVA12AA3-6.312M TR
OUTPUT WAVEFORM
CLOCK OUTPUT
V
OH
80% of Waveform
50% of Waveform
20% of Waveform
V
OL
Fall
Time
Rise
Time
T
W
T
Duty Cycle (%) = T
W
/T x 100
Test Circuit for CMOS Output
Oscilloscope
Frequency
Counter
Current
Meter
Power
Supply
Voltage
Meter
0.01µF
(Note 1)
0.1µF
(Note 1)
Supply
Voltage
(V
DD
)
Probe
(Note 2)
Output
Ground
Voltage
Control
C
L
(Note 3)
Power
Supply
Voltage
Meter
Note 1: An external 0.1µF low frequency tantalum bypass capacitor in parallel with a 0.01µF high frequency
ceramic bypass capacitor close to the package ground and V
DD
pin is required.
Note 2: A low capacitance (<12pF), 10X attenuation factor, high impedance (>10Mohms), and high bandwidth
(>300MHz) passive probe is recommended.
Note 3: Capacitance value C
L
includes sum of all probe and fixture capacitance.
www.ecliptek.com | Specification Subject to Change Without Notice | Rev A 3/12/2011 | Page 3 of 6
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