CRYSTAL-TO-3.3V LVPECL CLOCK SYNTHESIZER
ICS843S1066
General Description
The ICS843S1066 is a high frequency clock
generator and is a member of the HiPerClockS™
HiPerClockS™
family of High Performance Clock Solutions from
IDT. The ICS843S1066 uses an external 20MHz
crystal to synthesize either 1066.67MHz or
1600MHz. The ICS843S1066 has excellent cycle-to-cycle and
RMS period jitter performance.
Features
•
•
•
•
•
•
•
•
One differential LVPECL output
Crystal oscillator interface designed for 18pF, 20MHz parallel
resonant crystal
Cycle-to-Cycle Jitter: 25ps (maximum)
Period Jitter, RMS: 1.9ps (maximum)
Output Duty Cycle: 48 – 52%
Full 3.3V supply mode
0°C to 70°C ambient operating temperature
Available in lead-free (RoHS 6) package
ICS
The ICS843S1066 operates at 3.3V operating supply and is
available in a fully RoHS compliant 8-lead TSSOP package.
Table 1. Frequency Table
F_SEL
0
1
Crystal Frequency (MHz)
20
20
Multiplier Value
53.3
80
Output Frequency (MHz)
1066.67 (default)
1600
Block Diagram
F_SEL
Pulldown
Pin Assignment
V
CCA
V
EE
XTAL_OUT
XTAL_IN
1
2
3
4
8
7
6
5
V
CC
Q
nQ
F_SEL
20MHz
XTAL_IN
OSC
PLL Multiplier
Q
nQ
XTAL_OUT
ICS843S1066
8 Lead TSSOP
4.40mm x 3.0mm x 0.925mm
package body
G Package
Top View
IDT™ / ICS™
3.3V LVPECL CLOCK SYNTHESIZER
1
ICS843S1066CG REV. A AUGUST 27, 2008
ICS843S1066
CRYSTAL-TO-3.3V LVPECL CLOCK SYNTHESIZER
Table 2. Pin Descriptions
Number
1
2
3,
4
5
6, 7
8
Name
V
CCA
V
EE
XTAL_OUT
XTAL_IN
F_SEL
nQ, Q
V
CC
Power
Power
Input
Input
Output
Power
Pulldown
Type
Description
Analog supply pin.
Negative supply pin.
Crystal oscillator interface. XTAL_IN is the input, XTAL_OUT is the output.
Frequency select pin. LVCMOS/LVTTL interface levels.
Differential output pair. LVPECL interface levels.
Core supply pin.
NOTE:
Pulldown
refers to internal input resistors. See Table 2,
Pin Characteristics,
for typical values.
Table 3. Pin Characteristics
Symbol
C
IN
R
PULLDOWN
Parameter
Input Capacitance
Input Pulldown Resistor
Test Conditions
Minimum
Typical
4
51
Maximum
Units
pF
k
Ω
Absolute Maximum Ratings
NOTE: Stresses beyond those listed under
Absolute Maximum Ratings
may cause permanent damage to the device.
These ratings are stress specifications only. Functional operation of product at these conditions or any conditions beyond
those listed in the
DC Characteristics or AC Characteristics
is not implied. Exposure to absolute maximum rating conditions for
extended periods may affect product reliability.
Item
Supply Voltage, V
CC
Inputs, V
I
Outputs, I
O
Continuos Current
Surge Current
Package Thermal Impedance,
θ
JA
Storage Temperature, T
STG
Rating
4.6V
-0.5V to V
CC
+ 0.5V
50mA
100mA
115.2°C/W (0 mps)
-65°C to 150°C
DC Electrical Characteristics
Table 4A. Power Supply DC Characteristics,
V
CC
= 3.3V ± 5%, V
EE
= 0V, T
A
=
0°C to 70°C
Symbol
V
CC
V
CCA
I
EE
I
CCA
Parameter
Core Supply Voltage
Analog Supply Voltage
Power Supply Current
Analog Supply Current
Test Conditions
Minimum
3.135
V
CC
– 0.18
Typical
3.3
3.3
Maximum
3.465
V
CC
53
18
Units
V
V
mA
mA
IDT™ / ICS™
3.3V LVPECL CLOCK SYNTHESIZER
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ICS843S1066CG REV. A AUGUST 27, 2008
ICS843S1066
CRYSTAL-TO-3.3V LVPECL CLOCK SYNTHESIZER
Table 4B. LVCMOS/LVTTL DC Characteristics,
V
CC
= 3.3V ± 5%, V
EE
= 0V, T
A
=
0°C to 70°C
Symbol
V
IH
V
IL
I
IH
I
IL
Parameter
Input High Voltage
Input Low Voltage
Input High Current
Input Low Current
V
CC
= V
IN
= 3.465V
V
CC
= 3.465V, V
IN
= 0V
-10
Test Conditions
Minimum
2
-0.3
Typical
Maximum
V
CC
+ 0.3
0.8
150
Units
V
V
µA
µA
Table 4C. LVPECL DC Characteristics,
V
CC
= 3.3V ± 5%, V
EE
= 0V, T
A
=
0°C to 70°C
Symbol
V
OH
V
OL
V
SWING
Parameter
Output High Current; NOTE 1
Output Low Current; NOTE 1
Peak-to-Peak Output Voltage Swing
Test Conditions
Minimum
V
CC
– 1.3
V
CC
– 2.0
0.6
Typical
Maximum
V
CC
– 0.8
V
CC
– 1.6
1.0
Units
V
V
V
NOTE 1: Outputs terminated with 50Ω to V
CC
– 2V.
Table 5. Crystal Characteristics
Parameter
Mode of Oscillation
Frequency
Equivalent Series Resistance (ESR)
Shunt Capacitance
Test Conditions
Minimum
Typical
Fundamental
20
50
7
MHz
Maximum
Units
Ω
pF
AC Electrical Characteristics
Table 6. AC Characteristics,
V
CC
= 3.3V ± 5%, V
EE
= 0V, T
A
=
0°C to 70°C
Parameter
f
OUT
tjit(cc)
tjit(per)
t
R
/ t
F
odc
Symbol
Output Frequency
Cycle-to-Cycle Jitter; NOTE 1
Period Jitter; NOTE 1
Output Rise/Fall Time
Output Duty Cycle
20% to 80%
100
48
Test Conditions
F_SEL = 0
F_SEL = 1
Minimum
Typical
1066.67
1600
25
1.9
200
52
Maximum
Units
MHz
MHz
ps
ps
ps
%
NOTE 1: This parameter is defined in accordance with JEDEC Standard 65.
IDT™ / ICS™
3.3V LVPECL CLOCK SYNTHESIZER
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ICS843S1066CG REV. A AUGUST 27, 2008
ICS843S1066
CRYSTAL-TO-3.3V LVPECL CLOCK SYNTHESIZER
Parameter Measurement Information
2V
nQ
V
CC
V
CCA
Qx
SCOPE
Q
tcycle
n
➤
LVPECL
nQx
V
EE
tjit(cc)
=
|
tcycle
n –
tcycle
n+1
|
1000 Cycles
-1.3V±0.165V
3.3V LVPECL Output Load AC Test Circuit
Cycle-to-Cycle Jitter
V
OH
V
REF
V
OL
nQ
80%
1σ contains 68.26% of all measurements
2σ contains 95.4% of all measurements
3σ contains 99.73% of all measurements
4σ contains 99.99366% of all measurements
6σ contains (100-1.973x10
-7
)% of all measurements
20%
Q
t
R
Histogram
Reference Point
(Trigger Edge)
Mean Period
(First edge after trigger)
Period Jitter
Output Rise/Fall Time
nQ
Q
t
PW
t
PERIOD
odc =
t
PW
t
PERIOD
x 100%
Output Duty Cycle/Pulse Width/Period
IDT™ / ICS™
3.3V LVPECL CLOCK SYNTHESIZER
4
ICS843S1066CG REV. A AUGUST 27, 2008
➤
➤
tcycle
n+1
➤
80%
V
SW I N G
20%
t
F
ICS843S1066
CRYSTAL-TO-3.3V LVPECL CLOCK SYNTHESIZER
Application Information
Power Supply Filtering Technique
As in any high speed analog circuitry, the power supply pins are
vulnerable to random noise. To achieve optimum jitter perform-
ance, power supply isolation is required. TheICS843S1066
provides separate power supplies to isolate any high switching
noise from the outputs to the internal PLL. V
CC
and V
CCA
should
be individually connected to the power supply plane through vias,
and 0.01µF bypass capacitors should be used for each pin.
Figure
1
illustrates this for a generic V
CC
pin and also shows that V
CCA
requires that an additional 10Ω resistor along with a 10µF bypass
capacitor be connected to the V
CCA
pin.
3.3V
V
CC
.01µF
V
CCA
.01µF
10µF
10Ω
Figure 1. Power Supply Filtering
Crystal Input Interface
The ICS843S1066 has been characterized with 18pF parallel
resonant crystals. The capacitor values, C1 and C2, shown in
Figure 2
below were determined using a 20MHz, 18pF parallel
resonant crystal and were chosen to minimize the ppm error. The
optimum C1 and C2 values can be slightly adjusted for different
board layouts.
X1
18pF Parallel Crystal
XTAL_OUT
C2
14p
XTAL_IN
C1
14p
Figure 2. Crystal Input Interface
IDT™ / ICS™
3.3V LVPECL CLOCK SYNTHESIZER
5
ICS843S1066CG REV. A AUGUST 27, 2008
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