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8440258AKI-45LFT

Description
Clock Generator, 156.25MHz, 5 X 5 MM, 0.925 MM HEIGHT, 0.50 MM PITCH, ROHS COMPLIANT, VFQFN-32
CategoryThe embedded processor and controller    Microcontrollers and processors   
File Size856KB,20 Pages
ManufacturerIDT (Integrated Device Technology)
Environmental Compliance  
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8440258AKI-45LFT Overview

Clock Generator, 156.25MHz, 5 X 5 MM, 0.925 MM HEIGHT, 0.50 MM PITCH, ROHS COMPLIANT, VFQFN-32

8440258AKI-45LFT Parametric

Parameter NameAttribute value
Is it lead-free?Lead free
Is it Rohs certified?conform to
MakerIDT (Integrated Device Technology)
Parts packaging codeQFN
package instruction5 X 5 MM, 0.925 MM HEIGHT, 0.50 MM PITCH, ROHS COMPLIANT, VFQFN-32
Contacts32
Reach Compliance Codecompliant
ECCN codeEAR99
JESD-30 codeS-XQCC-N32
JESD-609 codee3
length5 mm
Humidity sensitivity level3
Number of terminals32
Maximum operating temperature85 °C
Minimum operating temperature-40 °C
Maximum output clock frequency156.25 MHz
Package body materialUNSPECIFIED
encapsulated codeHVQCCN
Encapsulate equivalent codeLCC32,.2SQ,20
Package shapeSQUARE
Package formCHIP CARRIER, HEAT SINK/SLUG, VERY THIN PROFILE
Peak Reflow Temperature (Celsius)260
power supply2.5 V
Master clock/crystal nominal frequency25 MHz
Certification statusNot Qualified
Maximum seat height1 mm
Maximum slew rate125 mA
Maximum supply voltage2.625 V
Minimum supply voltage2.375 V
Nominal supply voltage2.5 V
surface mountYES
technologyCMOS
Temperature levelINDUSTRIAL
Terminal surfaceMatte Tin (Sn) - annealed
Terminal formNO LEAD
Terminal pitch0.5 mm
Terminal locationQUAD
Maximum time at peak reflow temperature30
width5 mm
uPs/uCs/peripheral integrated circuit typeCLOCK GENERATOR, OTHER
FemtoClock
®
Crystal/LVCMOS-to-
LVDS/LVCMOS Frequency Synthesizer
ICS8440258I-45
DATA SHEET
General Description
The ICS8440258I-45 is a eight output synthesizer optimized to
generate Gigabit and 10 Gigabit Ethernet clocks. Using a 25MHz,
18pF parallel resonant crystal, the device will generate both
156.25MHz and 125MHz clocks with mixed LVDS and LVCMOS/
LVTTL output levels. The ICS8440258I-45 uses IDT’s 3
RD
generation low phase noise VCO technology and can achieve <1ps
typical rms phase jitter, easily meeting Ethernet jitter requirements.
The ICS8440258I-45 is packaged in a small, 5mm x 5mm VFQFN
package that is optimum for applications with space limitations.
Features
One differential LVDS output at 156.25MHz or 125MHz
Four differential LVDS outputs at 125MHz
Three LVCMOS/LVTTL single-ended outputs at 125MHz
Selectable crystal oscillator interface or LVCMOS/LVTTL
single-ended input and PLL bypass from a single select pin
VCO range: 490MHz - 680MHz
RMS phase jitter @ 125MHz, using a 25MHz crystal
(1.875MHz - 20MHz): 0.41ps (typical), LVDS outputs
RMS phase jitter @ 156.25MHz, using a 25MHz crystal
(1.875MHz - 20MHz): 0.43ps (typical), Q0, nQ0 output
Full 2.5V supply mode
-40°C to 85°C ambient operating temperature
Available in lead-free (RoHS 6) package
Block Diagram
nPLL_BYPASS
Pullup
F_SEL
Pulldown
REF_CLK
Pulldown
25MHz
0
0
Q0
nQ0
XTAL_IN
Phase
Detector
1
VCO
490-680MHz
÷5
÷4
1
OSC
XTAL_OUT
0
Q1
nQ1
Q2
nQ2
Pin Assignment
nPLL_BYPASS
÷5
÷25
1
XTAL_OUT
REF_CLK
XTAL_IN
F_SEL
GND
V
DDA
V
DD
Q3
nQ3
32 31 30 29 28 27 26 25
Q0
nQ0
GND
Q1
nQ1
V
DDO_LVDS
Q2
nQ2
1
2
3
4
5
6
7
8
9
GND
24
23
nc
V
DDO_LVCMOS
Q7
GND
Q6
V
DDO_LVCMOS
Q5
GND
Q4
nQ4
Q5
ICS8440258I-45
32-Lead VFQFN
5mm x 5mm x 0.925mm
package body
K Package
Top View
10 11 12 13 14 15 16
nQ4
GND
V
DDO_LVDS
nQ3
V
DD
Q3
Q4
22
21
20
19
18
17
Q6
Q7
ICS8440258AKI-45 REVISION A APRIL 28, 2011
1
©2011 Integrated Device Technology, Inc.

8440258AKI-45LFT Related Products

8440258AKI-45LFT 8440258AKI-45LF
Description Clock Generator, 156.25MHz, 5 X 5 MM, 0.925 MM HEIGHT, 0.50 MM PITCH, ROHS COMPLIANT, VFQFN-32 Clock Generator, 156.25MHz, 5 X 5 MM, 0.925 MM HEIGHT, 0.50 MM PITCH, ROHS COMPLIANT, VFQFN-32
Is it lead-free? Lead free Lead free
Is it Rohs certified? conform to conform to
Maker IDT (Integrated Device Technology) IDT (Integrated Device Technology)
Parts packaging code QFN QFN
package instruction 5 X 5 MM, 0.925 MM HEIGHT, 0.50 MM PITCH, ROHS COMPLIANT, VFQFN-32 5 X 5 MM, 0.925 MM HEIGHT, 0.50 MM PITCH, ROHS COMPLIANT, VFQFN-32
Contacts 32 32
Reach Compliance Code compliant compliant
ECCN code EAR99 EAR99
JESD-30 code S-XQCC-N32 S-XQCC-N32
JESD-609 code e3 e3
length 5 mm 5 mm
Humidity sensitivity level 3 3
Number of terminals 32 32
Maximum operating temperature 85 °C 85 °C
Minimum operating temperature -40 °C -40 °C
Maximum output clock frequency 156.25 MHz 156.25 MHz
Package body material UNSPECIFIED UNSPECIFIED
encapsulated code HVQCCN HVQCCN
Encapsulate equivalent code LCC32,.2SQ,20 LCC32,.2SQ,20
Package shape SQUARE SQUARE
Package form CHIP CARRIER, HEAT SINK/SLUG, VERY THIN PROFILE CHIP CARRIER, HEAT SINK/SLUG, VERY THIN PROFILE
Peak Reflow Temperature (Celsius) 260 260
power supply 2.5 V 2.5 V
Master clock/crystal nominal frequency 25 MHz 25 MHz
Certification status Not Qualified Not Qualified
Maximum seat height 1 mm 1 mm
Maximum slew rate 125 mA 125 mA
Maximum supply voltage 2.625 V 2.625 V
Minimum supply voltage 2.375 V 2.375 V
Nominal supply voltage 2.5 V 2.5 V
surface mount YES YES
technology CMOS CMOS
Temperature level INDUSTRIAL INDUSTRIAL
Terminal surface Matte Tin (Sn) - annealed Matte Tin (Sn) - annealed
Terminal form NO LEAD NO LEAD
Terminal pitch 0.5 mm 0.5 mm
Terminal location QUAD QUAD
Maximum time at peak reflow temperature 30 30
width 5 mm 5 mm
uPs/uCs/peripheral integrated circuit type CLOCK GENERATOR, OTHER CLOCK GENERATOR, OTHER
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