The Intersil ISL90460 is a digitally controlled potentiometer
(XDCP). Configured as a variable resistor, the device
consists of a resistor array, wiper switches, a control section,
and volatile memory. The wiper position is controlled by a
2-pin Up/Down interface.
The potentiometer is implemented by a resistor array
composed of 31 resistive elements and a wiper switching
network. Between each element and at either end are tap
points accessible to the wiper terminal. The position of the
wiper element is controlled by the CS and U/D inputs.
The device can be used in a wide variety of applications
including:
• LCD contrast control
• Parameter and bias adjustments
• Industrial and automotive control
• Transducer adjustment of pressure, temperature, position,
chemical, and optical sensors
• Laser Diode driver biasing
• Gain control and offset adjustment
Features
• Volatile Solid-State Potentiometer
• 2-pin UP/DN Interface
• DCP Terminal Voltage, 2.7V to 5.5V
• Tempco 35ppm/
°C Typical
• 32 Wiper Tap Points
• Low Power CMOS
- Active current 25µA max.
- Supply current 0.3µA
• Available R
TOTAL
Values = 10kΩ, 50kΩ, 100kΩ
• Temp Range
-40°C to +85°C
• Packages
- 5 Ld SC-70, SOT-23
• Pb-Free Plus Anneal Available (RoHS Compliant)
Pinout
ISL90460
(5 LD SOT-23, SC-70)
TOP VIEW
VDD
RH
GND
U/D
CS
Ordering Information
PART NUMBER
ISL90460WIE527-TK
ISL90460WIE527Z-TK (See Note)
ISL90460WIH527-TK
ISL90460UIE527-TK
ISL90460UIE527Z-TK (See Note)
ISL90460UIH527-TK
ISL90460UIH527Z -TK (See Note)
ISL90460TIE527-TK
ISL90460TIE527Z-TK (See Note)
ISL90460TIH527-TK
ISL90460TIH527Z-TK (See Note)
PART MARKING
AJM
DDY
AJV
AJN
DDW
AJX
DDX
AJO
DDU
AJW
DDV
100
50
R
TOTAL
(K)
10
TEMP RANGE (°C)
-40 to +85
-40 to +85
-40 to +85
-40 to +85
-40 to +85
-40 to +85
-40 to +85
-40 to +85
-40 to +85
-40 to +85
-40 to +85
-40 to +85
PACKAGE (Tape and Reel)
5 Ld SC-70
5 Ld SC-70 (Pb-free)
5 Ld SOT-23
5 Ld SOT-23 (Pb-free)
5 Ld SC-70
5 Ld SC-70 (Pb-free)
5 Ld SOT-23
5 Ld SOT-23 (Pb-free)
5 Ld SC-70
5 Ld SC-70 (Pb-free)
5 Ld SOT-23
5 Ld SOT-23 (Pb-free)
PKG. DWG. #
P5.049
P5.049
P5.046
P5.046
P5.049
P5.049
P5.046
P5.046
P5.049
P5.049
P5.046
P5.046
ISL90460WIH527Z -TK (See Note) DDZ
NOTE: Intersil Pb-free plus anneal products employ special Pb-free material sets; molding compounds/die attach materials and 100% matte tin plate termination finish, which are
RoHS compliant and compatible with both SnPb and Pb-free soldering operations. Intersil Pb-free products are MSL classified at Pb-free peak reflow temperatures that meet or exceed
the Pb-free requirements of IPC/JEDEC J STD-020.
1
CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.
1-888-INTERSIL or 1-888-468-3774
|
Intersil (and design) is a registered trademark of Intersil Americas Inc.
XDCP is a trademark of Intersil Americas Inc. Copyright Intersil Americas Inc. 2005. All Rights Reserved
All other trademarks mentioned are the property of their respective owners.
CAUTION: Stresses above those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress rating only; functional operation
of the device (at these or any other conditions above those listed in the operational sections of this specification) is not implied. Exposure to absolute maximum rating
conditions for extended periods may affect device reliability.
Potentiometer Specifications
Over recommended operating conditions unless otherwise stated
SYMBOL
R
TOT
PARAMETER
End to end resistance
W version
U version
T version
V
R
R
H
, R
L
terminal voltages
Noise
R
W
I
W
Wiper Resistance
Wiper Current
Resolution
Absolute linearity (Note 1)
Relative linearity (Note 2)
R
TOTAL
temperature coefficient
C
H
/C
L
/C
W
NOTES:
1. Absolute linearity is utilized to determine actual wiper voltage versus expected voltage = (R
H
(n)
(actual) - R
H
(n)
(expected)) = ±1 Ml Maximum.
n = 1 .. 29 only.
2. Relative linearity is a measure of the error in step size between taps = R
H
(n+1)
- [R
H
(n)
+ Ml] = ±0.5 Ml, n = 1 .. 29 only.
3. 1 Ml = Minimum Increment = R
TOT
/31.
4. Typical values are for T
A
= 25°C and nominal supply voltage.
Potentiometer capacitances
See equivalent circuit
R
H(n)(actual)
- R
H(n)(expected)
R
H(n+1)
- [R
H(n)+MI
]
±35
10/10/25
1
Ref: 1kHz
CONDITIONS
MIN
8
40
80
0
-120
600
0.6
32
±1
±0.5
TYP
(Note 4)
10
50
100
MAX
12
60
120
V
CC
UNIT
kΩ
kΩ
kΩ
V
dBV
Ω
mA
Taps
MI
(Note 3)
MI
(Note 3)
ppm/°C
pF
Equivalent Circuit
R
TOTAL
R
H
C
H
C
W
C
L
R
L
R
W
3
FN8225.2
FN8225.3
October 6, 2005
June 7,
ISL90460
DC Electrical Specifications
SYMBOL
I
CC
I
SB
I
LI
I
LI
V
IH
V
IL
C
IN
Over recommended operating conditions unless otherwise specified.
TEST CONDITIONS
CS = 0V, U/D = f
clock
= 1MHz and
V
CC
= 3V
CS = V
CC
, U/D = V
SS
or V
CC
= 3V
V
IN
= V
SS
to V
CC
V
IN
= V
SS
to V
CC
V
CC
x 0.7
V
CC
x 0.3
V
CC
= 3V, V
IN
= V
SS
, T
A
= 25°C,
f = 1MHz
10
0.3
MIN
TYP
(Note 4)
MAX
25
1
±1
±1
UNIT
µA
µA
µA
µA
V
V
pF
PARAMETER
VCC active current (Increment)
Standby supply current
CS input leakage current
U/D input leakage current
CS, U/D input HIGH voltage
CS, U/D input LOW voltage
CS, U/D input capacitance
Timing Specifications
SYMBOL
t
CU
t
CI
t
IC
t
lL
t
lH
f
TOGGLE
t
SETTLE
U/D to CS setup
CS to U/D setup
CS to U/D hold
U/D LOW period
U/D HIGH period
Over recommended operating conditions unless otherwise specified) (Figures 1 and 2)
PARAMETER
MIN
25
50
25
300
300
1
1
TYP (Note 4)
MAX
UNIT
ns
ns
ns
ns
ns
MHz
µs
Up/Down toggle rate
Output settling time
CS
t
CU
t
IL
t
IC
U/D
t
CI
t
IH
t
SETTLE
RH
FIGURE 1. SERIAL INTERFACE TIMING DIAGRAM, INCREMENT
4
FN8225.3
October 7, 2005
ISL90460
CS
t
CU
t
IH
U/D
t
CI
RH
t
IL
t
SETTLE
t
IC
FIGURE 2. SERIAL INTERFACE TIMING DIAGRAM, DECREMENT
Pin Descriptions
RH
The ISL90460 contains a digital potentiometer connected as
a rheostat or variable resistor. The wiper and one terminal of
the digital potentiometer is tied to the RH pin, and the other
terminal of the potentiometer is tied to the ground pin (GND).
The resistance from the RH pin to ground will vary with the
potentiometer setting; at the highest setting, the resistance
will be the maximum (Rtot), at the lowest setting it will be a
minimum.
Principles of Operation
There are two sections of the ISL90460: the input control,
counter and decode section; and the resistor array. The input
control section operates just like an up/down counter. The
output of this counter is decoded to turn on a single
electronic switch connecting a point on the resistor array to
the wiper output. The resistor array is comprised of 31
individual resistors connected in series. At either end of the
array and between each resistor is an electronic switch that
transfers the connection at that point to the wiper. The wiper
is connected to the RH terminal, forming a variable resistor
from RH to GND.
The direction of the wiper movement is defined when the
device is selected. If during CS transition from High to Low
the U/D input is LOW, the wiper will move down on each
rising edge of U/D toggling. Similarly, the wiper will move up
on each rising edge of U/D toggling if, during CS transition
from High to Low, the U/D input is High.
The wiper, when at either fixed terminal, acts like its
mechanical equivalent and does not move beyond the last
position. That is, the counter does not wrap around when
clocked to either extreme.
If the wiper is moved several positions, multiple taps are
connected to the wiper for t
SETTLE
(U/D to RH change). The
2-terminal resistance value for the device can temporarily
change by a significant amount if the wiper is moved several
positions.
Up/Down (U/D)
The U/D input controls the direction of the wiper movement
and whether the counter is incremented or decremented.
Chip Select (CS)
The device is selected when the CS input is LOW. The
current counter value is stored in volatile memory when CS
is returned HIGH. When CS is high, the device is placed in
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