DV74AC323N datasheet, PDF - EEWORLD Datasheet

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DV74AC323N: DescriptionParallel In Parallel Out, AC Series, 8-Bit, Bidirectional, True Output, CMOS, PDIP20, PLASTIC, DIP-20; Categorylogic logic; File Size317KB，7 Pages; ManufacturerAVG [AVG Semiconductors(HITEK)]

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DV74AC323N Overview

Parallel In Parallel Out, AC Series, 8-Bit, Bidirectional, True Output, CMOS, PDIP20, PLASTIC, DIP-20

DV74AC323N Parametric

Parameter Name	Attribute value
Maker	AVG [AVG Semiconductors(HITEK)]
Parts packaging code	DIP
package instruction	DIP,
Contacts	20
Reach Compliance Code	unknown
Other features	HOLD MODE; COMMON I/O PINS; TOTEMPOLE SERIAL SHIFT RIGHT & SHIFT LEFT OUTPUTS; GATED OUTPUT CONTROL
Counting direction	BIDIRECTIONAL
series	AC
JESD-30 code	R-PDIP-T20
length	26.415 mm
Load capacitance (CL)	50 pF
Logic integrated circuit type	PARALLEL IN PARALLEL OUT
Number of digits	8
Number of functions	1
Number of terminals	20
Maximum operating temperature	85 °C
Minimum operating temperature	-40 °C
Output characteristics	3-STATE
Output polarity	TRUE
Package body material	PLASTIC/EPOXY
encapsulated code	DIP
Package shape	RECTANGULAR
Package form	IN-LINE
propagation delay (tpd)	23 ns
Certification status	Not Qualified
Maximum seat height	4.57 mm
Maximum supply voltage (Vsup)	6 V
Minimum supply voltage (Vsup)	2 V
Nominal supply voltage (Vsup)	5 V
surface mount	NO
technology	CMOS
Temperature level	INDUSTRIAL
Terminal form	THROUGH-HOLE
Terminal pitch	2.54 mm
Terminal location	DUAL
Trigger type	POSITIVE EDGE
width	7.62 mm
minfmax	105 MHz

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DV74AC323N Related Products

	DV74AC323N	DV74ACT299N	DV74AC323DW	DV74AC299DW	DV74ACT323DW	DV74ACT299DW	DV74AC299N	DV74ACT323N
Description	Parallel In Parallel Out, AC Series, 8-Bit, Bidirectional, True Output, CMOS, PDIP20, PLASTIC, DIP-20	Parallel In Parallel Out, ACT Series, 8-Bit, Bidirectional, True Output, CMOS, PDIP20, PLASTIC, DIP-20	Parallel In Parallel Out, AC Series, 8-Bit, Bidirectional, True Output, CMOS, PDSO20, PLASTIC, SOP-20	Parallel In Parallel Out, AC Series, 8-Bit, Bidirectional, True Output, CMOS, PDSO20, PLASTIC, SOP-20	Parallel In Parallel Out, ACT Series, 8-Bit, Bidirectional, True Output, CMOS, PDSO20, PLASTIC, SOP-20	Parallel In Parallel Out, ACT Series, 8-Bit, Bidirectional, True Output, CMOS, PDSO20, PLASTIC, SOP-20	Parallel In Parallel Out, AC Series, 8-Bit, Bidirectional, True Output, CMOS, PDIP20, PLASTIC, DIP-20	Parallel In Parallel Out, ACT Series, 8-Bit, Bidirectional, True Output, CMOS, PDIP20, PLASTIC, DIP-20
Parts packaging code	DIP	DIP	SOIC	SOIC	SOIC	SOIC	DIP	DIP
package instruction	DIP,	PLASTIC, DIP-20	PLASTIC, SOP-20	PLASTIC, SOP-20	SOP,	SOP,	DIP,	PLASTIC, DIP-20
Contacts	20	20	20	20	20	20	20	20
Reach Compliance Code	unknown	unknown	unknown	unknown	unknown	unknown	unknown	unknown
Counting direction	BIDIRECTIONAL	BIDIRECTIONAL	BIDIRECTIONAL	BIDIRECTIONAL	BIDIRECTIONAL	BIDIRECTIONAL	BIDIRECTIONAL	BIDIRECTIONAL
series	AC	ACT	AC	AC	ACT	ACT	AC	ACT
JESD-30 code	R-PDIP-T20	R-PDIP-T20	R-PDSO-G20	R-PDSO-G20	R-PDSO-G20	R-PDSO-G20	R-PDIP-T20	R-PDIP-T20
length	26.415 mm	26.415 mm	12.8 mm	12.8 mm	12.8 mm	12.8 mm	26.415 mm	26.415 mm
Logic integrated circuit type	PARALLEL IN PARALLEL OUT	PARALLEL IN PARALLEL OUT	PARALLEL IN PARALLEL OUT	PARALLEL IN PARALLEL OUT	PARALLEL IN PARALLEL OUT	PARALLEL IN PARALLEL OUT	PARALLEL IN PARALLEL OUT	PARALLEL IN PARALLEL OUT
Number of digits	8	8	8	8	8	8	8	8
Number of functions	1	1	1	1	1	1	1	1
Number of terminals	20	20	20	20	20	20	20	20
Maximum operating temperature	85 °C	85 °C	85 °C	85 °C	85 °C	85 °C	85 °C	85 °C
Minimum operating temperature	-40 °C	-40 °C	-40 °C	-40 °C	-40 °C	-40 °C	-40 °C	-40 °C
Output characteristics	3-STATE	3-STATE	3-STATE	3-STATE	3-STATE	3-STATE	3-STATE	3-STATE
Output polarity	TRUE	TRUE	TRUE	TRUE	TRUE	TRUE	TRUE	TRUE
Package body material	PLASTIC/EPOXY	PLASTIC/EPOXY	PLASTIC/EPOXY	PLASTIC/EPOXY	PLASTIC/EPOXY	PLASTIC/EPOXY	PLASTIC/EPOXY	PLASTIC/EPOXY
encapsulated code	DIP	DIP	SOP	SOP	SOP	SOP	DIP	DIP
Package shape	RECTANGULAR	RECTANGULAR	RECTANGULAR	RECTANGULAR	RECTANGULAR	RECTANGULAR	RECTANGULAR	RECTANGULAR
Package form	IN-LINE	IN-LINE	SMALL OUTLINE	SMALL OUTLINE	SMALL OUTLINE	SMALL OUTLINE	IN-LINE	IN-LINE
propagation delay (tpd)	23 ns	15 ns	23 ns	23 ns	15 ns	15 ns	23 ns	15 ns
Certification status	Not Qualified	Not Qualified	Not Qualified	Not Qualified	Not Qualified	Not Qualified	Not Qualified	Not Qualified
Maximum seat height	4.57 mm	4.57 mm	2.65 mm	2.65 mm	2.65 mm	2.65 mm	4.57 mm	4.57 mm
Maximum supply voltage (Vsup)	6 V	5.5 V	6 V	6 V	5.5 V	5.5 V	6 V	5.5 V
Minimum supply voltage (Vsup)	2 V	4.5 V	2 V	2 V	4.5 V	4.5 V	2 V	4.5 V
Nominal supply voltage (Vsup)	5 V	5 V	5 V	5 V	5 V	5 V	5 V	5 V
surface mount	NO	NO	YES	YES	YES	YES	NO	NO
technology	CMOS	CMOS	CMOS	CMOS	CMOS	CMOS	CMOS	CMOS
Temperature level	INDUSTRIAL	INDUSTRIAL	INDUSTRIAL	INDUSTRIAL	INDUSTRIAL	INDUSTRIAL	INDUSTRIAL	INDUSTRIAL
Terminal form	THROUGH-HOLE	THROUGH-HOLE	GULL WING	GULL WING	GULL WING	GULL WING	THROUGH-HOLE	THROUGH-HOLE
Terminal pitch	2.54 mm	2.54 mm	1.27 mm	1.27 mm	1.27 mm	1.27 mm	2.54 mm	2.54 mm
Terminal location	DUAL	DUAL	DUAL	DUAL	DUAL	DUAL	DUAL	DUAL
Trigger type	POSITIVE EDGE	POSITIVE EDGE	POSITIVE EDGE	POSITIVE EDGE	POSITIVE EDGE	POSITIVE EDGE	POSITIVE EDGE	POSITIVE EDGE
width	7.62 mm	7.62 mm	7.5 mm	7.5 mm	7.5 mm	7.5 mm	7.62 mm	7.62 mm
minfmax	105 MHz	110 MHz	105 MHz	105 MHz	110 MHz	110 MHz	105 MHz	110 MHz
Maker	AVG [AVG Semiconductors(HITEK)]	AVG [AVG Semiconductors(HITEK)]	AVG [AVG Semiconductors(HITEK)]	AVG [AVG Semiconductors(HITEK)]	-	AVG [AVG Semiconductors(HITEK)]	-	AVG [AVG Semiconductors(HITEK)]
Base Number Matches	-	1	1	1	1	1	1	-

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