8T49N1012-DDDNLGI8 datasheet, PDF

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8T49N1012-DDDNLGI8: DescriptionClock Generator; CategoryThe embedded processor and controller Microcontrollers and processors; File Size1MB，57 Pages; ManufacturerIDT (Integrated Device Technology); Environmental Compliance

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8T49N1012-DDDNLGI8 Overview

Clock Generator

8T49N1012-DDDNLGI8 Parametric

Parameter Name	Attribute value
Is it Rohs certified?	conform to
Maker	IDT (Integrated Device Technology)
package instruction	HVQCCN,
Reach Compliance Code	compliant
Other features	IT ALSO OPERATES AT 3.3V NOMINAL SUPPLY
JESD-30 code	S-XQCC-N72
length	10 mm
Number of terminals	72
Maximum operating temperature	85 °C
Minimum operating temperature	-40 °C
Maximum output clock frequency	1000 MHz
Package body material	UNSPECIFIED
encapsulated code	HVQCCN
Package shape	SQUARE
Package form	CHIP CARRIER, HEAT SINK/SLUG, VERY THIN PROFILE
Peak Reflow Temperature (Celsius)	260
Master clock/crystal nominal frequency	40 MHz
Maximum seat height	1 mm
Maximum supply voltage	2.625 V
Minimum supply voltage	2.375 V
Nominal supply voltage	2.5 V
surface mount	YES
technology	CMOS
Temperature level	INDUSTRIAL
Terminal form	NO LEAD
Terminal pitch	0.5 mm
Terminal location	QUAD
Maximum time at peak reflow temperature	30
width	10 mm
uPs/uCs/peripheral integrated circuit type	CLOCK GENERATOR, OTHER

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FemtoClock

NG 12-Output



Frequency Synthesizer

8T49N1012

Datasheet

General Description

The 8T49N1012 has one fractional-feedback PLL that can be used

for frequency synthesis. It is equipped with two integer and eight

fractional output dividers, allowing the generation of up to ten

different output frequencies, ranging from 8kHz to 1GHz. Eight of

these frequencies are completely independent of each other and the

inputs. Two more are related frequencies. The twelve outputs may

select among LVPECL, LVDS, HSCL or LVCMOS output levels.

This functionality makes it ideal to be used in any frequency

synthesis application, including 1G, 10G, 40G and 100G

Synchronous Ethernet, OTN, and SONET/SDH, including ITU-T

G.709 (2009) FEC rates.

The device supports Output Enable inputs and Lock and LOS status

outputs.

The device is programmable through an I

C interface. It also

supports I

C master capability to allow the register configuration to

be read from an external EEPROM.

Features

•

<350fs RMS typical jitter (including spurs), @122.88MHz (12kHz

to 20MHz)

Operating modes: locked to input signal and free-run

Operates from a 10MHz to 40MHz fundamental-mode crystal

Accepts one LVPECL, LVDS, LVHSTL, HCSL or LVCMOS input

clock

•

Accepts frequencies ranging from 10MHz up to 600MHz

•

Clock input monitoring

Generates 12 LVPECL / LVDS / HSCL or 24 LVCMOS output

clocks

•

Output frequencies ranging from 8kHz up to 1.0GHz (Q[8:11],

Differential)

•

Output frequencies ranging from 8kHz to 250MHz (LVCMOS)

Two Output Enable control inputs

Lock and Loss-of-Signal status outputs

Programmable output de-skew adjustments in steps as small as

16ps

C or via external I

C EEPROM

Bypass clock paths and Reference Output for system tests

Power supply modes:

/ V

CCA

/ V

CCO

3.3V / 3.3V / 3.3V

3.3V / 3.3V / 2.5V

3.3V / 3.3V / 1.8V (LVCMOS)

2.5V / 2.5V / 3.3V

2.5V / 2.5V / 2.5V

2.5V / 2.5V / 1.8V (LVCMOS)

-40°C to 85°C ambient operating temperature

Package: 72QFN, lead-free RoHs (6)

•

Applications

•

OTN or SONET / SDH equipment Line cards (up to OC-192, and

supporting FEC ratios)

Gigabit and Terabit IP switches / routers

Wireless base station baseband

Data communications

•

October 28, 2016

8T49N1012-DDDNLGI8 Related Products

	8T49N1012-DDDNLGI8	8T49N1012-DDDNLGI#	8T49N1012-DDDNLGI
Description	Clock Generator	Clock Generator	Clock Generator
Is it Rohs certified?	conform to	conform to	conform to
Maker	IDT (Integrated Device Technology)	IDT (Integrated Device Technology)	IDT (Integrated Device Technology)
package instruction	HVQCCN,	HVQCCN,	HVQCCN,
Reach Compliance Code	compliant	compliant	compliant
Other features	IT ALSO OPERATES AT 3.3V NOMINAL SUPPLY	IT ALSO OPERATES AT 3.3V NOMINAL SUPPLY	IT ALSO OPERATES AT 3.3V NOMINAL SUPPLY
JESD-30 code	S-XQCC-N72	S-XQCC-N72	S-XQCC-N72
length	10 mm	10 mm	10 mm
Number of terminals	72	72	72
Maximum operating temperature	85 °C	85 °C	85 °C
Minimum operating temperature	-40 °C	-40 °C	-40 °C
Maximum output clock frequency	1000 MHz	1000 MHz	1000 MHz
Package body material	UNSPECIFIED	UNSPECIFIED	UNSPECIFIED
encapsulated code	HVQCCN	HVQCCN	HVQCCN
Package shape	SQUARE	SQUARE	SQUARE
Package form	CHIP CARRIER, HEAT SINK/SLUG, VERY THIN PROFILE	CHIP CARRIER, HEAT SINK/SLUG, VERY THIN PROFILE	CHIP CARRIER, HEAT SINK/SLUG, VERY THIN PROFILE
Peak Reflow Temperature (Celsius)	260	260	260
Master clock/crystal nominal frequency	40 MHz	40 MHz	40 MHz
Maximum seat height	1 mm	1 mm	1 mm
Maximum supply voltage	2.625 V	2.625 V	2.625 V
Minimum supply voltage	2.375 V	2.375 V	2.375 V
Nominal supply voltage	2.5 V	2.5 V	2.5 V
surface mount	YES	YES	YES
technology	CMOS	CMOS	CMOS
Temperature level	INDUSTRIAL	INDUSTRIAL	INDUSTRIAL
Terminal form	NO LEAD	NO LEAD	NO LEAD
Terminal pitch	0.5 mm	0.5 mm	0.5 mm
Terminal location	QUAD	QUAD	QUAD
Maximum time at peak reflow temperature	30	30	30
width	10 mm	10 mm	10 mm
uPs/uCs/peripheral integrated circuit type	CLOCK GENERATOR, OTHER	CLOCK GENERATOR, OTHER	CLOCK GENERATOR, OTHER

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