8T49N524-DDDNLGI datasheet, PDF

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8T49N524-DDDNLGI: DescriptionClock Generator, 1290MHz, CMOS, 6 X 6 MM, 0.925 MM HEIGHT, ROHS COMPLIANT, MO-220VJJD-5, MO-220VJJC-3, VFQFPN-40; CategoryThe embedded processor and controller Microcontrollers and processors; File Size502KB，37 Pages; ManufacturerIDT (Integrated Device Technology); Environmental Compliance

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8T49N524-DDDNLGI Overview

Clock Generator, 1290MHz, CMOS, 6 X 6 MM, 0.925 MM HEIGHT, ROHS COMPLIANT, MO-220VJJD-5, MO-220VJJC-3, VFQFPN-40

8T49N524-DDDNLGI Parametric

Parameter Name	Attribute value
Is it Rohs certified?	conform to
Maker	IDT (Integrated Device Technology)
package instruction	HVQCCN,
Reach Compliance Code	compliant
ECCN code	EAR99
Other features	ALSO OPERATES TA 3.3 V SUPPLY; ALSO AVILABE IN 0.65 MM PITCH PACKAGE
JESD-30 code	S-XQCC-N40
length	6 mm
Number of terminals	40
Maximum operating temperature	85 °C
Minimum operating temperature	-40 °C
Maximum output clock frequency	1290 MHz
Package body material	UNSPECIFIED
encapsulated code	HVQCCN
Package shape	SQUARE
Package form	CHIP CARRIER, HEAT SINK/SLUG, VERY THIN PROFILE
Peak Reflow Temperature (Celsius)	260
Master clock/crystal nominal frequency	40 MHz
Maximum seat height	1 mm
Maximum supply voltage	2.625 V
Minimum supply voltage	2.375 V
Nominal supply voltage	2.5 V
surface mount	YES
technology	CMOS
Temperature level	INDUSTRIAL
Terminal form	NO LEAD
Terminal pitch	0.5 mm
Terminal location	QUAD
Maximum time at peak reflow temperature	30
width	6 mm
uPs/uCs/peripheral integrated circuit type	CLOCK GENERATOR, OTHER

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Programmable FemtoClock

NG LVPECL/LVDS

Dual 4-Output Fractional Clock Generator

IDT8T49N524I

DATA SHEET

General Description

The IDT8T49N524I is an eight output programmable any-rate dual

clock generator with selectable LVDS or LVPECL outputs. Both clock

generators use Fractional Output Dividers to be able to generate out-

put frequencies that are independent of each other and independent

of the input frequency. Output frequencies for both clock generators

are generated from a single crystal or reference clock.

Clock Generator A supports three different factory-programmed

default frequencies that can be selected from using only the FSEL

control pins. Alternatively any desired output frequency can be

programmed over the I

C serial port. The chosen output frequency is

then driven out the QA0 to QA3 outputs.

Clock Generator B supports a single factory-programmed default

frequency. It can also be programmed for any output frequency via

the serial port. The output frequency is driven out the QB0 to QB3

outputs.

Some examples of frequency configurations that can be achieved

are shown in Table 5A. Please consult IDT for programming software

that can be used to determine the required settings for any desired

configuration.

Excellent phase noise performance is achieved with IDT’s fourth

Generation FemtoClock

NG PLL technology, which delivers

sub-0.5ps RMS phase jitter in the integer divide mode.

Features

•

Fourth Generation FemtoClock

NG PLL technology

Eight outputs selectable as LVPECL or LVDS

Input selectable: fundamental mode crystal or clock reference

Supports fundamental mode crystals from 10MHz - 40MHz

CLK, nCLK input pair can accept the following differential input

levels: LVPECL, LVDS, HCSL

Input frequencies from 5MHz up to 800MHz

Two independent output frequencies can be generated

Output frequencies independent of each other and of input

Output frequencies from 15.234MHz - 645MHz, and

975MHz - 1290MHz, (See Table 5D for details)

RMS phase jitter at 125MHz (12kHz - 20MHz): 0.282ps (typical)

RMS phase jitter at 156.25MHz (12kHz - 20MHz):

0.278ps (typical)

Full 2.5V or 3.3V power supply

C programming interface

-40°C to 85°C ambient operating temperature

Lead-free (RoHS 6) packaging

/ V

CCA

/ V

CCO

3.3V / 3.3V / 3.3V

3.3V / 3.3V / 2.5V (LVPECL only)

2.5V / 2.5V / 2.5V

Pin Assignment

CCO_B

nQB1

nQB0

nQB2

nQB3

QB0

EE_B

QB1

QB2

QB3

EE_B

29 28 27 26 25 24 23 22 21

1 2

nQA0

QA0

FSEL1

ADDR_SEL

FSEL0

nCLK

CLK

SCLK

SDATA

IDT8T49N524I

CCA

LOCK

CLK_SEL

EE_A

40 Lead VFQFN

6mm x 6mm x 0.925mm

4.65mm x 4.65mm EPad

NL Package

Top View

nQA1

QA1

QA3

XTAL_OUT

XTAL_IN

5 6

QA2

nQA2

nQA3

EE_A

IDT8T49N524NLGI REVISION A JANUARY 23, 2014

CCO_A

8T49N524-DDDNLGI Related Products

	8T49N524-DDDNLGI	8T49N524-DDDNLGI8
Description	Clock Generator, 1290MHz, CMOS, 6 X 6 MM, 0.925 MM HEIGHT, ROHS COMPLIANT, MO-220VJJD-5, MO-220VJJC-3, VFQFPN-40	Clock Generator, 1290MHz, CMOS, 6 X 6 MM, 0.925 MM HEIGHT, ROHS COMPLIANT, MO-220VJJD-5, MO-220VJJC-3, VFQFPN-40
Is it Rohs certified?	conform to	conform to
Maker	IDT (Integrated Device Technology)	IDT (Integrated Device Technology)
package instruction	HVQCCN,	HVQCCN,
Reach Compliance Code	compliant	compliant
ECCN code	EAR99	EAR99
Other features	ALSO OPERATES TA 3.3 V SUPPLY; ALSO AVILABE IN 0.65 MM PITCH PACKAGE	ALSO OPERATES TA 3.3 V SUPPLY; ALSO AVILABE IN 0.65 MM PITCH PACKAGE
JESD-30 code	S-XQCC-N40	S-XQCC-N40
length	6 mm	6 mm
Number of terminals	40	40
Maximum operating temperature	85 °C	85 °C
Minimum operating temperature	-40 °C	-40 °C
Maximum output clock frequency	1290 MHz	1290 MHz
Package body material	UNSPECIFIED	UNSPECIFIED
encapsulated code	HVQCCN	HVQCCN
Package shape	SQUARE	SQUARE
Package form	CHIP CARRIER, HEAT SINK/SLUG, VERY THIN PROFILE	CHIP CARRIER, HEAT SINK/SLUG, VERY THIN PROFILE
Peak Reflow Temperature (Celsius)	260	260
Master clock/crystal nominal frequency	40 MHz	40 MHz
Maximum seat height	1 mm	1 mm
Maximum supply voltage	2.625 V	2.625 V
Minimum supply voltage	2.375 V	2.375 V
Nominal supply voltage	2.5 V	2.5 V
surface mount	YES	YES
technology	CMOS	CMOS
Temperature level	INDUSTRIAL	INDUSTRIAL
Terminal form	NO LEAD	NO LEAD
Terminal pitch	0.5 mm	0.5 mm
Terminal location	QUAD	QUAD
Maximum time at peak reflow temperature	30	30
width	6 mm	6 mm
uPs/uCs/peripheral integrated circuit type	CLOCK GENERATOR, OTHER	CLOCK GENERATOR, OTHER

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