V826632K24SCTGD0 datasheet, PDF

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V826632K24SCTGD0: DescriptionDDR DRAM Module, 32MX64, 0.65ns, CMOS, DIMM-184; Categorystorage storage; File Size130KB，13 Pages; ManufacturerProMOS Technologies Inc

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V826632K24SCTGD0 Overview

DDR DRAM Module, 32MX64, 0.65ns, CMOS, DIMM-184

V826632K24SCTGD0 Parametric

Parameter Name	Attribute value
Is it lead-free?	Contains lead
Is it Rohs certified?	incompatible
Maker	ProMOS Technologies Inc
Parts packaging code	DIMM
package instruction	DIMM, DIMM184
Contacts	184
Reach Compliance Code	compliant
ECCN code	EAR99
access mode	SINGLE BANK PAGE BURST
Maximum access time	0.65 ns
Other features	AUTO/SELF REFRESH
Maximum clock frequency (fCLK)	200 MHz
I/O type	COMMON
JESD-30 code	R-XDMA-N184
JESD-609 code	e4
memory density	2147483648 bit
Memory IC Type	DDR DRAM MODULE
memory width	64
Number of functions	1
Number of ports	1
Number of terminals	184
word count	33554432 words
character code	32000000
Operating mode	SYNCHRONOUS
Maximum operating temperature	70 °C
Minimum operating temperature
organize	32MX64
Output characteristics	3-STATE
Package body material	UNSPECIFIED
encapsulated code	DIMM
Encapsulate equivalent code	DIMM184
Package shape	RECTANGULAR
Package form	MICROELECTRONIC ASSEMBLY
Peak Reflow Temperature (Celsius)	NOT SPECIFIED
power supply	2.6 V
Certification status	Not Qualified
refresh cycle	8192
self refresh	YES
Maximum supply voltage (Vsup)	2.7 V
Minimum supply voltage (Vsup)	2.5 V
Nominal supply voltage (Vsup)	2.6 V
surface mount	NO
technology	CMOS
Temperature level	COMMERCIAL
Terminal surface	Gold (Au)
Terminal form	NO LEAD
Terminal pitch	1.27 mm
Terminal location	DUAL
Maximum time at peak reflow temperature	NOT SPECIFIED

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V826632K24SC

32M x 64 HIGH PERFORMANCE

UNBUFFERED DDR SDRAM MODULE

Features

■

184 Pin Unbuffered 33,554,432 x 64 bit

Organization DDR SDRAM Modules

■

Utilizes High Performance 32M x 8 DDR

SDRAM in TSOPII-66 Packages

■

Single +2.5V (± 0.2V) Power Supply

■

Single +2.6V (± 0.1V) Power Supply for DDR400

■

Programmable CAS Latency, Burst Length, and

Wrap Sequence (Sequential & Interleave)

■

Auto Refresh (CBR) and Self Refresh

■

All Inputs, Outputs are SSTL-2 Compatible

■

8192 Refresh Cycles every 64 ms

■

Serial Presence Detect (SPD)

■

DDR SDRAM Performance

Description

The V826632K24SC memory module is

organized 33,554,432 x 64 bits in a 184 pin memory

module. The 32M x 64 memory module uses 8

ProMOS 32M x 8 DDR SDRAM. The x64 modules

are ideal for use in high performance computer

systems where increased memory density and fast

access times are required.

Module Speed

Clock Frequency (max.)

Clock Cycle Time CAS Latency = 2

Clock Cycle Time CAS Latency = 2.5

Clock Cycle Time CAS Latency = 3

RCD

tRCD parameter

tRP parameter

200

(PC400A)

200

(PC400B)

166

(PC333)

Units

MHz

CLK

7.5

V826632K24SC Rev. 1.2 April 2006

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