IDT23S05-1HDCG datasheet, PDF - EEWORLD Datasheet

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IDT23S05-1HDCG: DescriptionPLL Based Clock Driver, 4 True Output(s), 0 Inverted Output(s), PDSO8, SOIC-8; Categorylogic logic; File Size161KB，9 Pages; ManufacturerIDT (Integrated Device Technology); Environmental Compliance

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IDT23S05-1HDCG Overview

PLL Based Clock Driver, 4 True Output(s), 0 Inverted Output(s), PDSO8, SOIC-8

IDT23S05-1HDCG Parametric

Parameter Name	Attribute value
Is it lead-free?	Lead free
Is it Rohs certified?	conform to
Parts packaging code	SOIC
package instruction	SOP, SOP8,.25
Contacts	8
Reach Compliance Code	compli
ECCN code	EAR99
Input adjustment	STANDARD
JESD-30 code	R-PDSO-G8
JESD-609 code	e3
length	4.9 mm
Logic integrated circuit type	PLL BASED CLOCK DRIVER
MaximumI(ol)	0.032 A
Humidity sensitivity level	1
Number of functions	1
Number of inverted outputs
Number of terminals	8
Actual output times	4
Maximum operating temperature	70 °C
Minimum operating temperature
Output characteristics	3-STATE
Package body material	PLASTIC/EPOXY
encapsulated code	SOP
Encapsulate equivalent code	SOP8,.25
Package shape	RECTANGULAR
Package form	SMALL OUTLINE
Peak Reflow Temperature (Celsius)	260
power supply	3.3 V
propagation delay (tpd)	0.35 ns
Certification status	Not Qualified
Same Edge Skew-Max（tskwd）	0.25 ns
Maximum seat height	1.7272 mm
Maximum supply voltage (Vsup)	3.6 V
Minimum supply voltage (Vsup)	3 V
Nominal supply voltage (Vsup)	3.3 V
surface mount	YES
Temperature level	COMMERCIAL
Terminal surface	Matte Tin (Sn) - annealed
Terminal form	GULL WING
Terminal pitch	1.27 mm
Terminal location	DUAL
Maximum time at peak reflow temperature	30
width	3.9 mm
minfmax	133 MHz
Base Number Matches	1

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IDT23S05

3.3V ZERO DELAY CLOCK BUFFER, SPREAD SPECTRUM

COMMERCIAL AND INDUSTRIAL TEMPERATURE RANGES

3.3V ZERO DELAY CLOCK

BUFFER, SPREAD SPECTRUM

COMPATIBLE

FEATURES:

•

Phase-Lock Loop Clock Distribution

10MHz to 133MHz operating frequency

Distributes one clock input to one bank of five outputs

Zero Input-Output Delay

Output Skew < 250ps

Low jitter <200 ps cycle-to-cycle

IDT23S05-1 for Standard Drive

IDT23S05-1H for High Drive

No external RC network required

Operates at 3.3V V

Power down mode

Spread spectrum compatible

Available in SOIC package

IDT23S05

DESCRIPTION:

The IDT23S05 is a high-speed phase-lock loop (PLL) clock buffer,

designed to address high-speed clock distribution applications. The zero

delay is achieved by aligning the phase between the incoming clock and

the output clock, operable within the range of 10 to 133MHz.

The IDT23S05 is an 8-pin version of the IDT23S09. IDT23S05 accepts

one reference input, and drives out five low skew clocks. The -1H version

of this device operates up to 133MHz frequency and has a higher drive than

the -1 device. All parts have on-chip PLLs which lock to an input clock on

the REF pin. The PLL feedback is on-chip and is obtained from the CLKOUT

pad. In the absence of an input clock, the IDT23S05 enters power down.

In this mode, the device will draw less than 12µA for Commercial Tempera-

ture range and less than 25µA for Industrial temperature range

the outputs

are tri-stated, and the PLL is not running, resulting in a significant reduction

of power.

The IDT23S05 is characterized for both Industrial and Commercial

operation.

FUNCTIONAL BLOCK DIAGRAM

CLKOUT

REF

PLL

Control

Logic

CLK1

CLK2

CLK3

CLK4

The IDT logo is a registered trademark of Integrated Device Technology, Inc.

COMMERCIAL AND INDUSTRIAL TEMPERATURE RANGES

2010

Integrated Device Technology, Inc.

AUGUST 2010

DSC 6381/7

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Is it lead-free?	Lead free	Lead free	Lead free	Lead free	Lead free	Lead free	Lead free
Is it Rohs certified?	conform to	conform to	conform to	conform to	conform to	conform to	conform to
Parts packaging code	SOIC	SOIC	SOIC	SOIC	SOIC	SOIC	SOIC
package instruction	SOP, SOP8,.25	SOP, SOP8,.25	SOP, SOP8,.25	SOP, SOP8,.25	SOP, SOP8,.25	SOP, SOP8,.25	SOP, SOP8,.25
Contacts	8	8	8	8	8	8	8
Reach Compliance Code	compli	compli	compli	compli	compli	compli	compli
ECCN code	EAR99	EAR99	EAR99	EAR99	EAR99	EAR99	EAR99
Input adjustment	STANDARD	STANDARD	STANDARD	STANDARD	STANDARD	STANDARD	STANDARD
JESD-30 code	R-PDSO-G8	R-PDSO-G8	R-PDSO-G8	R-PDSO-G8	R-PDSO-G8	R-PDSO-G8	R-PDSO-G8
JESD-609 code	e3	e3	e3	e3	e3	e3	e3
length	4.9 mm	4.9 mm	4.9 mm	4.9 mm	4.9 mm	4.9 mm	4.9 mm
Logic integrated circuit type	PLL BASED CLOCK DRIVER	PLL BASED CLOCK DRIVER	PLL BASED CLOCK DRIVER	PLL BASED CLOCK DRIVER	PLL BASED CLOCK DRIVER	PLL BASED CLOCK DRIVER	PLL BASED CLOCK DRIVER
MaximumI(ol)	0.032 A	0.032 A	0.032 A	0.032 A	0.032 A	0.032 A	0.032 A
Humidity sensitivity level	1	1	1	1	1	1	1
Number of functions	1	1	1	1	1	1	1
Number of terminals	8	8	8	8	8	8	8
Actual output times	4	4	4	4	4	4	4
Maximum operating temperature	70 °C	70 °C	85 °C	85 °C	85 °C	70 °C	70 °C
Output characteristics	3-STATE	3-STATE	3-STATE	3-STATE	3-STATE	3-STATE	3-STATE
Package body material	PLASTIC/EPOXY	PLASTIC/EPOXY	PLASTIC/EPOXY	PLASTIC/EPOXY	PLASTIC/EPOXY	PLASTIC/EPOXY	PLASTIC/EPOXY
encapsulated code	SOP	SOP	SOP	SOP	SOP	SOP	SOP
Encapsulate equivalent code	SOP8,.25	SOP8,.25	SOP8,.25	SOP8,.25	SOP8,.25	SOP8,.25	SOP8,.25
Package shape	RECTANGULAR	RECTANGULAR	RECTANGULAR	RECTANGULAR	RECTANGULAR	RECTANGULAR	RECTANGULAR
Package form	SMALL OUTLINE	SMALL OUTLINE	SMALL OUTLINE	SMALL OUTLINE	SMALL OUTLINE	SMALL OUTLINE	SMALL OUTLINE
Peak Reflow Temperature (Celsius)	260	260	260	260	260	260	260
power supply	3.3 V	3.3 V	3.3 V	3.3 V	3.3 V	3.3 V	3.3 V
propagation delay (tpd)	0.35 ns	0.35 ns	0.35 ns	0.35 ns	0.35 ns	0.35 ns	0.35 ns
Certification status	Not Qualified	Not Qualified	Not Qualified	Not Qualified	Not Qualified	Not Qualified	Not Qualified
Same Edge Skew-Max（tskwd）	0.25 ns	0.25 ns	0.25 ns	0.25 ns	0.25 ns	0.25 ns	0.25 ns
Maximum seat height	1.7272 mm	1.7272 mm	1.7272 mm	1.7272 mm	1.7272 mm	1.7272 mm	1.7272 mm
Maximum supply voltage (Vsup)	3.6 V	3.6 V	3.6 V	3.6 V	3.6 V	3.6 V	3.6 V
Minimum supply voltage (Vsup)	3 V	3 V	3 V	3 V	3 V	3 V	3 V
Nominal supply voltage (Vsup)	3.3 V	3.3 V	3.3 V	3.3 V	3.3 V	3.3 V	3.3 V
surface mount	YES	YES	YES	YES	YES	YES	YES
Temperature level	COMMERCIAL	COMMERCIAL	INDUSTRIAL	INDUSTRIAL	INDUSTRIAL	COMMERCIAL	COMMERCIAL
Terminal surface	Matte Tin (Sn) - annealed	Matte Tin (Sn) - annealed	Matte Tin (Sn) - annealed	Matte Tin (Sn) - annealed	Matte Tin (Sn) - annealed	Matte Tin (Sn) - annealed	Matte Tin (Sn) - annealed
Terminal form	GULL WING	GULL WING	GULL WING	GULL WING	GULL WING	GULL WING	GULL WING
Terminal pitch	1.27 mm	1.27 mm	1.27 mm	1.27 mm	1.27 mm	1.27 mm	1.27 mm
Terminal location	DUAL	DUAL	DUAL	DUAL	DUAL	DUAL	DUAL
Maximum time at peak reflow temperature	30	30	30	30	30	30	30
width	3.9 mm	3.9 mm	3.9 mm	3.9 mm	3.9 mm	3.9 mm	3.9 mm
minfmax	133 MHz	133 MHz	133 MHz	133 MHz	133 MHz	133 MHz	133 MHz
Base Number Matches	1	1	1	1	1	1	1

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