UPD72871F1-FA2 datasheet, PDF - EEWORLD Datasheet

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UPD72871F1-FA2: DescriptionLAN Controller, 4 Channel(s), 50MBps, CMOS, PBGA192, 14 X 14 MM, PLASTIC, FBGA-192; CategoryThe embedded processor and controller Microcontrollers and processors; File Size366KB，48 Pages; ManufacturerNEC Electronics

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UPD72871F1-FA2 Overview

LAN Controller, 4 Channel(s), 50MBps, CMOS, PBGA192, 14 X 14 MM, PLASTIC, FBGA-192

UPD72871F1-FA2 Parametric

Parameter Name	Attribute value
Maker	NEC Electronics
Parts packaging code	BGA
package instruction	LFBGA,
Contacts	192
Reach Compliance Code	unknown
Address bus width	32
maximum clock frequency	24.576 MHz
Data encoding/decoding methods	NRZ
Maximum data transfer rate	50 MBps
External data bus width	32
JESD-30 code	S-PBGA-B192
length	14 mm
Number of serial I/Os	4
Number of terminals	192
Maximum operating temperature	70 °C
Minimum operating temperature
Package body material	PLASTIC/EPOXY
encapsulated code	LFBGA
Package shape	SQUARE
Package form	GRID ARRAY, LOW PROFILE, FINE PITCH
Certification status	Not Qualified
Maximum seat height	1.46 mm
Maximum supply voltage	3.6 V
Minimum supply voltage	3 V
Nominal supply voltage	3.3 V
surface mount	YES
technology	CMOS
Temperature level	COMMERCIAL
Terminal form	BALL
Terminal pitch	0.8 mm
Terminal location	BOTTOM
width	14 mm
uPs/uCs/peripheral integrated circuit type	SERIAL IO/COMMUNICATION CONTROLLER, LAN

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PRELIMINARY DATA SHEET

PD72870,72871

IEEE1394 1-CHIP OHCI HOST CONTROLLER

MOS INTEGRATED CIRCUIT

The

PD72870, 72871 are the LSIs which integrated OHCI-Link and PHY function into a single chip.

The

PD72870, 72871 comply with the P1394a draft 2.0 specifications and the OpenHCI IEEE1394 1.0 and work

up to 400 Mbps.

These make design so compact for PC and PC card application.

FEATURES

• Compliant with Link Layer Services as defined in 1394 Open Host Controller Interface specification release 1.0

• Compliant with Physical Layer Services as defined in P1394a draft 2.0 (Data Rate 100/200/400 Mbps)

3-port :

PD72870

1-port :

PD72871

• Compliant with protocol enhancement as defined in P1394a draft 2.0

• Modular 32-bit host interface compliant to PCI Specification release 2.1

• Support PCI-Bus Power Management Interface Specification release 1.0

• Modular 32-bit host interface compliant to Card Bus Specification

• Cycle Master and Isochronous Resource Manager capable

• Built-in FIFOs for isochronous transmit (1024 bytes), asynchronous transmit (1024 bytes), and receive (2048

bytes)

• 32-bit CRC generation and checking for receive/transmit packets

• 4 isochronous transmit DMAs and 4 isochronous receive DMAs supported

• 32-bit DMA channels for physical memory read/write

• Clock generation by 24.576 MHz X’tal

• Internal control and operational registers direct-mapped to PCI configuration space

• 2-wire Serial EEPROM

interface supported

• Separate power supply Link and PHY

ORDERING INFORMATION

Part number

Package

160-pin plastic LQFP (Fine pitch) (24 x 24 mm)

192-pin Plastic FBGA (14 x 14 mm)

160-pin plastic LQFP (Fine pitch) (24 x 24 mm)

192-pin Plastic FBGA (14 x 14 mm)

PD72870GM-8ED

PD72870F1-FA2

PD72871GM-8ED

PD72871 F1-FA2

The information in this document is subject to change without notice. Before using this document, please

confirm that this is the latest version.

Not all devices/types available in every country. Please check with local NEC representative for

availability and additional information.

Document No. S13925EJ2V0DS00 (2nd edition)

Date Published September 1999 NS CP(K)

Printed in Japan

The mark

shows major revised points.

1999

UPD72871F1-FA2 Related Products

	UPD72871F1-FA2
Description	LAN Controller, 4 Channel(s), 50MBps, CMOS, PBGA192, 14 X 14 MM, PLASTIC, FBGA-192
Maker	NEC Electronics
Parts packaging code	BGA
package instruction	LFBGA,
Contacts	192
Reach Compliance Code	unknown
Address bus width	32
maximum clock frequency	24.576 MHz
Data encoding/decoding methods	NRZ
Maximum data transfer rate	50 MBps
External data bus width	32
JESD-30 code	S-PBGA-B192
length	14 mm
Number of serial I/Os	4
Number of terminals	192
Maximum operating temperature	70 °C
Package body material	PLASTIC/EPOXY
encapsulated code	LFBGA
Package shape	SQUARE
Package form	GRID ARRAY, LOW PROFILE, FINE PITCH
Certification status	Not Qualified
Maximum seat height	1.46 mm
Maximum supply voltage	3.6 V
Minimum supply voltage	3 V
Nominal supply voltage	3.3 V
surface mount	YES
technology	CMOS
Temperature level	COMMERCIAL
Terminal form	BALL
Terminal pitch	0.8 mm
Terminal location	BOTTOM
width	14 mm
uPs/uCs/peripheral integrated circuit type	SERIAL IO/COMMUNICATION CONTROLLER, LAN

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