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29FCT2052ATP

Description
PDIP-24, Tube
Categorylogic    logic   
File Size110KB,7 Pages
ManufacturerIDT (Integrated Device Technology)
Download Datasheet Parametric View All

29FCT2052ATP Overview

PDIP-24, Tube

29FCT2052ATP Parametric

Parameter NameAttribute value
Brand NameIntegrated Device Technology
Is it lead-free?Contains lead
Is it Rohs certified?incompatible
Parts packaging codePDIP
package instructionDIP, DIP24,.3
Contacts24
Manufacturer packaging codePT24
Reach Compliance Code_compli
Control typeINDEPENDENT CONTROL
Counting directionBIDIRECTIONAL
seriesFCT
JESD-30 codeR-PDIP-T24
JESD-609 codee0
length31.75 mm
Logic integrated circuit typeREGISTERED BUS TRANSCEIVER
MaximumI(ol)0.012 A
Humidity sensitivity level1
Number of digits8
Number of functions2
Number of ports2
Number of terminals24
Maximum operating temperature85 °C
Minimum operating temperature-40 °C
Output characteristics3-STATE
Output polarityTRUE
Package body materialPLASTIC/EPOXY
encapsulated codeDIP
Encapsulate equivalent codeDIP24,.3
Package shapeRECTANGULAR
Package formIN-LINE
Peak Reflow Temperature (Celsius)245
power supply5 V
Prop。Delay @ Nom-Su10 ns
propagation delay (tpd)10 ns
Certification statusNot Qualified
Maximum seat height4.191 mm
Maximum supply voltage (Vsup)5.25 V
Minimum supply voltage (Vsup)4.75 V
Nominal supply voltage (Vsup)5 V
surface mountNO
technologyCMOS
Temperature levelINDUSTRIAL
Terminal surfaceTin/Lead (Sn85Pb15)
Terminal formTHROUGH-HOLE
Terminal pitch2.54 mm
Terminal locationDUAL
Maximum time at peak reflow temperatureNOT SPECIFIED
translateN/A
Trigger typePOSITIVE EDGE
width7.62 mm
Base Number Matches1
IDT29FCT2052AT/BT/CT
FAST CMOS OCTAL REGISTERED TRANSCEIVER
COMMERCIAL TEMPERATURE RANGE
FAST CMOS
OCTAL REGISTERED
TRANSCEIVER
IDT29FCT2052AT/BT/CT
FEATURES:
Low input and output leakage
≤1µ
A (max.)
Extended commercial range of –40°C to +85°C
CMOS power levels
True TTL input and output compatibility
V
OH
= 3.3V (typ.)
V
OL
= 0.3V (typ.)
Meets or exceeds JEDEC standard 18 specifications
Product available in Radiation Tolerant and Radiation Enhanced
versions
Available in PDIP, SOIC, SSOP, QSOP, and TSSOP packages
A, B and C speed grades
Resistor outputs
(-15mA I
OH
, 12mA I
OL
)
Reduced system switching noise
DESCRIPTION:
The IDT29FCT2052AT/BT/CT/DT is an 8-bit registered transceiver
built using an advanced dual metal CMOS technology. Two 8-bit back-to-
back registers store data flowing in both directions between two bidirectional
buses. Separate clock, clock enable and 3-state output enable signals are
provided for each register. Both A outputs and B outputs are guaranteed
to sink 64mA.
The IDT29FCT2052AT/BT/CT has balanced drive outputs with current
limiting resistors. This offers low ground bounce, minimal undershoot and
controlled output fall times-reducing the need for external series terminating
resistors. The IDT29FCT2052T part is a plug-in replacement for the
IDT29FCT52T part.
FUNCTIONAL BLOCK DIAGRAM
CPA
CEA
A
0
A
1
A
2
A
3
A
4
A
5
A
6
A
7
D
0
CE
D
1
D
2
D
3
D
4
D
5
D
6
D
7
A
Reg.
CP
Q
0
Q
1
Q
2
Q
3
Q
4
Q
5
Q
6
Q
7
OEB
B
0
B
1
B
2
B
3
B
4
B
5
B
6
B
7
Q
0
Q
1
Q
2
Q
3
Q
4
Q
5
Q
6
Q
7
CE
OEA
B
Reg.
D
0
D
1
D
2
D
3
D
4
D
5
D
6
CP D
7
CPB
CEB
COMMERCIAL TEMPERATURE RANGE
1
c
1999 Integrated Device Technology, Inc.
SEPTEMBER 1999
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