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CAT25C33GLE-1.8

Description
EEPROM, 4KX8, Serial, CMOS, PDIP8, ROHS COMPLIANT, PLASTIC, DIP-8
Categorystorage    storage   
File Size314KB,11 Pages
ManufacturerCatalyst
Websitehttp://www.catalyst-semiconductor.com/
Environmental Compliance
Download Datasheet Parametric View All

CAT25C33GLE-1.8 Overview

EEPROM, 4KX8, Serial, CMOS, PDIP8, ROHS COMPLIANT, PLASTIC, DIP-8

CAT25C33GLE-1.8 Parametric

Parameter NameAttribute value
Is it Rohs certified?conform to
MakerCatalyst
Parts packaging codeDIP
package instructionDIP,
Contacts8
Reach Compliance Codeunknown
ECCN codeEAR99
Maximum clock frequency (fCLK)1 MHz
JESD-30 codeR-PDIP-T8
JESD-609 codee4
length9.59 mm
memory density32768 bit
Memory IC TypeEEPROM
memory width8
Number of functions1
Number of terminals8
word count4096 words
character code4000
Operating modeSYNCHRONOUS
Maximum operating temperature125 °C
Minimum operating temperature-40 °C
organize4KX8
Package body materialPLASTIC/EPOXY
encapsulated codeDIP
Package shapeRECTANGULAR
Package formIN-LINE
Parallel/SerialSERIAL
Peak Reflow Temperature (Celsius)NOT SPECIFIED
Certification statusNot Qualified
Maximum seat height4.57 mm
Serial bus typeSPI
Maximum supply voltage (Vsup)6 V
Minimum supply voltage (Vsup)1.8 V
Nominal supply voltage (Vsup)5 V
surface mountNO
technologyCMOS
Temperature levelAUTOMOTIVE
Terminal surfaceNickel/Palladium/Gold (Ni/Pd/Au)
Terminal formTHROUGH-HOLE
Terminal pitch2.54 mm
Terminal locationDUAL
Maximum time at peak reflow temperatureNOT SPECIFIED
width7.62 mm
Maximum write cycle time (tWC)10 ms
CAT25C33/65
32K/64K-Bit SPI Serial CMOS EEPROM
FEATURES
s
10 MHz SPI compatible
s
1.8 to 6.0 volt operation
s
Hardware and software protection
s
Low power CMOS technology
s
SPI modes (0,0 &1,1)
s
Commercial, industrial, automotive and extended
s
1,000,000 program/erase cycles
s
100 year data tetention
s
Self-timed write cycle
s
8-pin DIP/SOIC and 14-pin TSSOP
s
64-byte page write buffer
s
Block write protection
temperature ranges
– Protect first page, last page, any 1/4 or lower
1/2 of EEPROM array
DESCRIPTION
The CAT25C33/65 is a 32K/64K-Bit SPI Serial CMOS
EEPROM internally organized as 4Kx8/8Kx8 bits.
Catalyst’s advanced CMOS Technology substantially
reduces device power requirements. The CAT25C33/
65 features a 64-byte page write buffer. The device
operates via the SPI bus serial interface and is enabled
though a Chip Select (CS). In addition to the Chip Select,
the clock input (SCK), data in (SI) and data out (SO) are
PIN CONFIGURATION
SOIC Package (S, V, GV)
CS
SO
WP
VSS
1
2
3
4
8
7
6
5
VCC
HOLD
SCK
SI
TSSOP Package (U14, Y14)
CS
SO
NC
NC
NC
WP
V
SS
DIP Package (P, L, GL)
CS
SO
WP
VSS
1
2
3
4
PIN FUNCTIONS
Pin Name
SO
SCK
WP
D
V
CC
V
SS
CS
SI
HOLD
NC
s
i
7
6
5
8
VCC
HOLD
SCK
SI
o
c
i
t
n
1
2
3
4
5
6
7
14
13
12
11
10
9
8
VCC
HOLD
NC
NC
NC
SCK
SI
u
n
required to access the device. The
HOLD
pin may be
used to suspend any serial communication without
resetting the serial sequence. The CAT25C32/64 is
designed with software and hardware write protection
features including Block write protection. The device is
available in 8-pin DIP, 8-pin SOIC, 14-pin TSSOP and
20-pin TSSOP packages.
d
e
a
P
CONTROL LOGIC
s
t
r
BLOCK DIAGRAM
SENSE AMPS
SHIFT REGISTERS
WORD ADDRESS
BUFFERS
COLUMN
DECODERS
SO
SI
CS
WP
HOLD
SCK
I/O
CONTROL
SPI
CONTROL
LOGIC
BLOCK
PROTECT
LOGIC
XDEC
E
2
PROM
ARRAY
Function
Serial Data Output
Serial Clock
Write Protect
+1.8V to +6.0V Power Supply
Ground
Chip Select
Serial Data Input
Suspends Serial Input
No Connect
STATUS
REGISTER
DATA IN
STORAGE
HIGH VOLTAGE/
TIMING CONTROL
© 2005 by Catalyst Semiconductor, Inc.
Characteristics subject to change without notice
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