DATA SHEET
MOS INTEGRATED CIRCUIT
µ
PD17240,17241,17242,17243,17244,17245,17246
4-BIT SINGLE-CHIP MICROCONTROLLERS
FOR SMALL GENERAL-PURPOSE INFRARED
REMOTE CONTROL TRANSMITTERS
DESCRIPTION
The
µ
PD17240, 17241, 17242, 17243, 17244, 17245, 17246 (hereafter called the
µ
PD17246 Subseries) are 4-
bit single-chip microcontrollers for small general-purpose infrared remote control transmitters.
This subseries employs 17K general-purpose register system architecture for the CPU, and can directly execute
operations between data memories instead of the conventional method of executing operations through an
accumulator. Moreover, all the instructions are 16-bit/1-word instructions, enabling efficient programming.
In addition, a one-time PROM model, the
µ
PD17P246, to which data can be written only once, is also available.
This product is convenient either for evaluating the
µ
PD17246 Subseries programs or for small-scale production of
application systems.
Detailed function descriptions are provided in the following user's manual. Be sure to read them before
designing.
µ
PD172×× Subseries User's Manual: U12795E
FEATURES
• Infrared remote controller carrier generator (REM output)
• 17K architecture: General-purpose register system
• Program memory (ROM), data memory (RAM)
µ
PD17240
Program
4 KB
447
×
4 bits
memory (ROM) (2,048
×
16)
Data memory
(RAM)
µ
PD17241
8 KB
(4,096
×
16)
µ
PD17242
12 KB
(6,144
×
16)
µ
PD17243
16 KB
(8,192
×
16)
µ
PD17244
20 KB
µ
PD17245
24 KB
µ
PD17246
32 KB
(10,240
×
16) (12,288
×
16) (16,384
×
16)
• 8-bit timer:
1 channel
• Basic interval timer/watchdog timer: 1 channel
• Instruction execution time (can be changed in two steps)
@ f
X
= 4 MHz:
• External interrupt pin (INT/P1B
0
):
• I/O pins:
• Supply voltage:
• On-chip RAM retention detector
• Low-voltage detector (mask option)
Unless otherwise specified, the
µ
PD17246 is treated as the representative model throughout this document.
4
µ
s (high-speed mode)/8
µ
s (normal mode)
1
24
V
DD
= 2.0 to 3.6 V
The information in this document is subject to change without notice. Before using this document, please
confirm that this is the latest version.
Not all products and/or types are available in every country. Please check with an NEC Electronics
sales representative for availability and additional information.
Document No. U15002EJ1V0DS00 (1st edition)
Date Published April 2003 N CP (K)
Printed in Japan
The mark
shows major revised points.
c
µ
PD17240, 17241, 17242, 17243, 17244, 17245, 17246
APPLICATIONS
Preset remote controllers, toys, portable systems, etc.
ORDERING INFORMATION
Part Number
Package
30-pin plastic SSOP (7.62 mm (300))
30-pin plastic SSOP (7.62 mm (300))
30-pin plastic SSOP (7.62 mm (300))
30-pin plastic SSOP (7.62 mm (300))
30-pin plastic SSOP (7.62 mm (300))
30-pin plastic SSOP (7.62 mm (300))
30-pin plastic SSOP (7.62 mm (300))
µ
PD17240MC-×××-5A4
µ
PD17241MC-×××-5A4
µ
PD17242MC-×××-5A4
µ
PD17243MC-×××-5A4
µ
PD17244MC-×××-5A4
µ
PD17245MC-×××-5A4
µ
PD17246MC-×××-5A4
Remark
×××
indicates ROM code suffix.
2
Data Sheet U15002EJ1V0DS
µ
PD17240, 17241, 17242, 17243, 17244, 17245, 17246
DIFFERENCES BETWEEN
µ
PD17246 SUBSERIES,
µ
PD17236 SUBSERIES, AND
µ
PD17255
SUBSERIES (1/2)
Item
ROM
µ
PD17246 Subseries
µ
PD17240:
µ
PD17241:
µ
PD17242:
µ
PD17243:
µ
PD17244:
µ
PD17245:
µ
PD17246:
447
×
4 bits
2,048
4,096
6,144
8,192
×
×
×
×
16
16
16
16
bits
bits
bits
bits
µ
PD17236 Subseries
µ
PD17230:
µ
PD17231:
µ
PD17232:
µ
PD17233:
µ
PD17234:
µ
PD17235:
µ
PD17236:
223
×
4 bits
2,048
4,096
6,144
8,192
×
×
×
×
16
16
16
16
bits
bits
bits
bits
µ
PD17225 Subseries
µ
PD17225:
µ
PD17226:
µ
PD17227:
µ
PD17228:
2,048
4,096
6,144
8,192
×
×
×
×
16
16
16
16
bits
bits
bits
bits
10,240
×
16 bits
12,288
×
16 bits
16,384
×
16 bits
10,240
×
16 bits
12,288
×
16 bits
16,384
×
16 bits
111
×
4 bits
(
µ
PD17225, 17226)
223
×
4 bits
(
µ
PD17227, 17228)
P0B
0
to P0B
3
: Input
P0C
0
to P0C
3
: Output
P0D
0
to P0D
3
: Output
RAM
Ports
P0B
0
to P0B
3
: I/O (bit I/O)
P0C
0
to P0C
3
: I/O (group I/O)
P0D
0
to P0D
3
: I/O (group I/O)
P1A
0
to P1A
2
: I/O (bit I/O)
P1B
0
: I/O, functions
alternately as INT pin
P0B
0
to P0B
3
: I/O (bit I/O)
P0C
0
to P0C
3
: I/O (group I/O)
P0D
0
to P0D
3
: I/O (group I/O)
P1A
0
: Input or output
selectable by mask
option
Reset
• Reset by watchdog
timer
• Reset by stack pointer
• Low-voltage detector
(mask option)
The RESET pin is internally pulled down by the occurrence of
the internal reset signals on the left, causing a reset (usually,
the RESET pin is pulled up).
A low level is output from the
WDOUT pin by the
occurrence of the internal
reset signals on the left, and
a reset takes place if the
WDOUT pin is externally
connected to the RESET pin.
Capacitor for oscillation
Vector address
Selected by mask option
(15 pF)
Basic interval timer: 0002H
Rising and falling
edges of INT pin:
0003H
8-bit timer:
0004H
Not provided
Basic interval timer:
0001H
Rising and falling edges of INT pin: 0002H
8-bit timer:
0003H
RAM retention flag
Provided
Not provided
Data Sheet U15002EJ1V0DS
3
µ
PD17240, 17241, 17242, 17243, 17244, 17245, 17246
DIFFERENCES BETWEEN
µ
PD17246 SUBSERIES,
µ
PD17236 SUBSERIES, AND
µ
PD17255
SUBSERIES (2/2)
Item
STOP mode release
condition
µ
PD17246 Subseries
<1> When any of pins P0A
0
to P0A
3
goes low
<2> When pins P0B
0
to P0B
3
,
P0C
0
to P0C
3
, and P0D
0
µ
PD17236 Subseries
µ
PD17225 Subseries
<1> When any of pins P0A
0
When any of pins P0A
0
to
to P0A
3
goes low
P0A
3
and P0B
0
to P0B
3
goes
<2> When pins P0B
0
to P0B
3
, low
P0C
0
to P0C
3
, and P0D
0
to P0D
3
are used as input
to P0D
3
are used as
pins and when any of
input pins and when any
them goes low
of them goes low
<3> When an interrupt
<3> When an interrupt
request (IRQ) of the
request (IRQ) of the
interrupt for which the IP
interrupt for which the IP
flag is set is generated at
flag is set is generated
the rising edge or falling
at the rising edge or
edge of the INT pin
falling edge of the INT
<4> When P0E
0
to P0E
3
are
pin
used as input pins when
a key matrix is used and
when any of these pins
goes low
<5> When P1A
0
to P1A
2
and
P1B
0
are used as input
pins when a key matrix is
used and when the level
of any of these pins
equals the set clear level
Carrier frequency
(f
X
= 4 MHz)
Selected by register file
(after reset: f
X
/2)
<1> If carrier generation clock
is f
X
/2: 3.9 kHz to 1 MHz
<2> If carrier generation clock
is f
X
: 7.8 kHz to 2 MHz
<3> If carrier generation clock
is 2f
X
: 15.6 kHz to 4 MHz
NRZ low-level period
setting modulo register
(NRZLTMM) and NRZ
high-level period setting
modulo register
(NRZHTMM)
• NRZLTMM: 8 bits
(REM output control bit is bit
1 of register file at address
12H)
• NRZHTMM: 8 bits
• NRZLTMM: 7 bits (bit 7 is REM output control bit)
• NRZHTMM: 7 bits (bit 7 is fixed to 0)
Selected by mask option
<1> If carrier generation
clock is f
X
/2: 7.8 kHz to
1 MHz
<2> If carrier generation
clock is f
X
: 15.6 kHz to
2 MHz
7.8 kHz to 1 MHz
4
Data Sheet U15002EJ1V0DS
µ
PD17240, 17241, 17242, 17243, 17244, 17245, 17246
PIN CONFIGURATION (TOP VIEW)
• 30-pin plastic SSOP (7.62 mm (300))
µ
PD17240MC-×××-5A4, 17241MC-×××-5A4, 17242MC-×××-5A4, 17243MC-×××-5A4,
µ
PD17244MC-×××-5A4, 17245MC-×××-5A4, 17246MC-×××-5A4
P0D
2
P0D
3
P1B
0
/INT
P0E
0
P0E
1
P0E
2
P0E
3
REM
V
DD
X
OUT
X
IN
GND
RESET
P1A
0
P1A
1
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
30
29
28
27
26
25
24
23
22
21
20
19
18
17
16
P1A
2
P0D
1
P0D
0
P0C
3
P0C
2
P0C
1
P0C
0
P0B
3
P0B
2
P0B
1
P0B
0
P0A
3
P0A
2
P0A
1
P0A
0
GND:
INT:
Ground
External interrupt request signal input
P0A
0
to P0A
3
: Input port (CMOS input with pull-up resistor)
P0B
0
to P0B
3
: I/O port (CMOS input with pull-up resistor/N-ch open-drain output)
P0C
0
to P0C
3
: I/O port (CMOS input with pull-up resistor/N-ch open-drain output)
P0D
0
to P0D
3
: I/O port (CMOS input with pull-up resistor/N-ch open-drain output)
P0E
0
to P0E
3
: I/O port (when key matrix is used: CMOS input with pull-up resistor/N-ch open-
drain output, when key matrix is not used: CMOS input/push-pull output)
P1A
0
/P1A
2
:
P1B
0
:
REM:
RESET:
V
DD
:
X
IN
, X
OUT
:
Input port (when key matrix is used: CMOS input/N-ch open-drain output, when
key matrix is not used: CMOS input/push-pull output)
Input port (CMOS input)
Remote controller output (CMOS push-pull output)
Reset input
Power supply
Resonator connection
Data Sheet U15002EJ1V0DS
5
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