UPD17145CTA1 datasheet, PDF - EEWORLD Datasheet

DATA SHEET

MOS INTEGRATED CIRCUIT

µ

PD17145(A1), 17147(A1), 17149(A1)

SMALL, GENERAL-PURPOSE

4-BIT SINGLE-CHIP MICROCONTROLLERS

The

µ

PD17145(A1), 17147(A1), and 17149(A1) are 4-bit single-chip microcontrollers integrating an 8-bit

A/D converter (4 channels), a timer function (3 channels), and a serial interface.

These microcontrollers employ a CPU of the general-purpose register type that can execute direct memory

operations and direct memory-to-memory data transfer for efficient programming. All the instructions consist

of 16 bits per word.

In addition, a one-time PROM version, the

µ

PD17P149, is also available for program evaluation.

The functions of these microcontrollers are described in detail in the following User’s Manual. Be sure

to read the following manual when designing your system:

µ

PD17145 Subseries User’s Manual: IEU-1383

FEATURES

• 17K architecture

• Program memory (ROM)

: General-purpose register type

: Instruction length fixed to 16 bits

:

µ

PD17145(A1) : 2 KB (1024

×

16 bits)

:

µ

PD17147(A1) : 4 KB (2048

×

16 bits)

:

µ

PD17149(A1) : 8 KB (4096

×

16 bits)

• Data memory (RAM)

• External interrupt

• Instruction execution time

• 8-bit A/D converter

• Timer

• Serial interface

• POC circuit (mask option)

• Operating voltage

• Operating temperature

: V

DD

= 2.7 to 5.5 V (at 400 kHz to 2 MHz)

: V

DD

= 4.5 to 5.5 V (at 400 kHz to 8 MHz)

: T

a

= –40 to +110 ˚C

: 110

×

4 bits

: 1 (INT pin, with sense input)

: 2

µ

s (at 8 MHz: ceramic oscillation)

: 4 channels, absolute accuracy:

±1.5

LSB MAX. (V

DD

= 4.0 to 5.5 V)

: 3 channels

: 1 channel (clocked 3-wire)

APPLICATIONS

Automotive electronics, etc.

Unless contextually excluded, references in this data sheet to the

µ

PD17149 (A1) mean the

µ

PD17145

(A1) and

µ

PD17147 (A1).

The information in this document is subject to change without notice.

Document No. U13233EJ1V1DS00 (1st edition)

(Previous No. IC-3580)

Date Published January 1998 N CP(K)

Printed in Japan

©

1995

µ

PD17145(A1), 17147(A1), 17149(A1)

ORDERING INFORMATION

Part Number

Package

28-pin plastic shrink DIP (400 mil)

28-pin plastic SOP (375 mil)

28-pin plastic shrink DIP (400 mil)

28-pin plastic SOP (375 mil)

28-pin plastic shrink DIP (400 mil)

28-pin plastic SOP (375 mil)

Quality Grade

Special

µ

PD17145CT(A1)-×××

µ

PD17145GT(A1)-×××

µ

PD17147CT(A1)-×××

µ

PD17147GT(A1)-×××

µ

PD17149CT(A1)-×××

µ

PD17149GT(A1)-×××

Remark

×××

indicates ROM code suffix.

Please refer to "Quality Grades on NEC Semiconductor Devices" (Document No. C11531E) published by

NEC Corporation to know the specification of quality grade on the devices and its recommended applications.

2

µ

PD17145(A1), 17147(A1), 17149(A1)

FUNCTION LIST

Part Number

µ

PD17145 (A1)

Item

ROM capacity

RAM capacity

Stack

2 KB (1024

×

16 bits)

110

×

4 bits

µ

PD17147 (A1)

4 KB (2048

×

16 bits)

µ

PD17149 (A1)

8 KB (4096

×

16 bits)

Address stack

×

5, interrupt stack

×

3

• I/O

: 20

: 2

: 1

I/O ports

23

• Input

• Sense input (INT pin

Note

)

A/D converter input

4 channels (shared with port pins), absolute accuracy:

±1.5

LSB MAX.

• 8-bit timer/counter:

2 channels (can be used as 1 channel of 16-bit timer)

Timer

3 channels

• 7-bit basic interval timer:

1 channel (can be used as watchdog timer)

Serial interface

1 channel (3-wire)

• Multiple interrupt by hardware (3 levels MAX.)

• External interrupt (INT): 1

Rising edge, falling edge, or both rising and falling

edges selectable for detection.

Interrupt

• Internal interrupt: 4

• Timer 0 (TM0)

• Timer 1 (TM1)

• Basic interval timer (BTM)

• Serial interface (SIO)

Instruction execution time

Standby function

POC circuit

2

µ

s (at 8 MHz, ceramic oscillation)

HALT, STOP

Mask option

(Can be used in application circuit that operates on V

DD

= 5 V

±

10 %, 400 kHz to 4 MHz)

2.7 to 5.5 V (at 400 kHz to 2 MHz)

Operating voltage

4.5 to 5.5 V (at 400 kHz to 8 MHz)

28-pin plastic shrink DIP (400 mil)

Package

28-pin plastic SOP (375 mil)

One-time PROM version

Quality grade is "standard" and not (A1).

Operating temperature range: T

a

= –40 to +85 ˚C

µ

PD17P149

Note

The INT pin is used as an input pin (sense input) when the external interrupt function is not used.

The status of this pin is read by using the INT flag of a control register, not by a port register.

Caution

The PROM version is functionally compatible with the mask ROM versions but its internal

circuit and part of the electrical characteristics are different from those of the mask ROM

versions. To replace the PROM version with a mask ROM version, thoroughly conduct

application evaluation by using a sample of the mask ROM version.

3

µ

PD17145(A1), 17147(A1), 17149(A1)

PIN CONFIGURATION (Top View)

28-pin plastic shrink DIP (400 mil)

28-pin plastic SOP (375 mil)

V

DD

P0F

1

/V

REF

P0C

3

/ADC

3

P0C

2

/ADC

2

P0C

1

/ADC

1

P0C

0

/ADC

0

P0B

3

P0B

2

P0B

1

P0B

0

P0A

3

P0A

2

P0A

1

P0A

0

1

2

3

4

5

6

7

8

9

10

11

12

13

14

28

27

26

25

24

23

22

21

20

19

18

17

16

15

GND

X

IN

X

OUT

RESET

INT

P0F

0

/RLS

P0D

0

/SCK

P0D

1

/SO

P0D

2

/SI

P0D

3

/TM1OUT

P0E

0

P0E

1

P0E

2

P0E

3

µ

PD17145CT(A1) -

×××

µ

PD17145GT(A1) -

×××

µ

PD17147CT(A1) -

×××

µ

PD17147GT(A1) -

×××

µ

PD17149CT(A1) -

×××

µ

PD17149GT(A1) -

×××

ADC

0

-ADC

3

GND

INT

P0A

0

to P0A

3

P0B

0

to P0B

3

P0C

0

to P0C

3

P0D

0

to P0D

3

P0E

0

to P0E

3

RESET

RLS

SCK

SI

SO

TM1OUT

V

DD

V

REF

X

IN

, X

OUT

: analog input

: ground

: external interrupt input

: port 0A

: port 0B

: port 0C

: port 0D

: port 0E

: reset input

: standby release signal input

: serial clock I/O

: serial data input

: serial data output

: timer 1 output

: power

: A/D converter reference voltage

: for system clock oscillation

P0F

0

and P0F

1

: port 0F

4

µ

PD17145(A1), 17147(A1), 17149(A1)

BLOCK DIAGRAM

V

DD

Clock

Divider

fx/2

N

System Clock

Generator

CPU CLOCK CLK STOP

X

IN

X

OUT

P0A

3

P0A

2

P0A

1

P0A

0

P0B

3

P0B

2

P0B

1

P0B

0

P0C

3

/ADC

3

P0C

2

/ADC

2

P0C

1

/ADC

1

P0C

0

/ADC

0

RF

P0A

(CMOS)

INT

Interrupt

Controller

RAM

110

×

4 bits

SYSTEM REG.

IRQTM0

IRQTM1

IRQBTM

IRQSIO

IRQBTM

P0B

(CMOS)

Basic Interval Timer

IRQTM1

ALU

fx/2

N

P0C

(CMOS)

Timer 1

IRQTM0

fx/2

N

fx/2

N

Timer 0

A/D

Converter

P0F

1

/V

REF

P0F

Note 1

P0E

(N-ch)

ROM

Instruction

Decoder

P0E

3

P0E

2

P0E

1

P0E

0

P0F

0

/RLS

P0D

3

/TM1OUT

P0D

2

/SI

P0D

1

/SO

P0D

0

/SCK

P0D

(N-ch)

RESET

Program Counter

GND

Serial

Interface

TM1

IRQSIO

Stack

Note 2

Notes 1.

The ROM capacity of each product is as follows:

1024

×

16 bits:

µ

PD17145(A1)

2048

×

16 bits:

µ

PD17147(A1)

4096

×

16 bits:

µ

PD17149(A1)

2.

The stack capacity of each product is as follows:

5

×

10 bits:

µ

PD17145(A1)

5

×

11 bits:

µ

PD17147(A1)

5

×

12 bits:

µ

PD17149(A1)

Remark

CMOS or N-ch in ( ) indicate the output format of the port.

CMOS : CMOS push-pull output

N-ch

: N-ch open-drain output

5

UPD17145CTA1

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