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74AUP1G126GN

Description
AUP/ULP/V SERIES, 1-BIT DRIVER, TRUE OUTPUT, PDSO6, 0.90 X 1 MM, 0.35 MM HEIGHT, SOT-1115, SON-6
Categorylogic    logic   
File Size146KB,24 Pages
ManufacturerNXP
Websitehttps://www.nxp.com
Environmental Compliance
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74AUP1G126GN Overview

AUP/ULP/V SERIES, 1-BIT DRIVER, TRUE OUTPUT, PDSO6, 0.90 X 1 MM, 0.35 MM HEIGHT, SOT-1115, SON-6

74AUP1G126GN Parametric

Parameter NameAttribute value
Is it Rohs certified?conform to
MakerNXP
Parts packaging codeSON
package instruction0.90 X 1 MM, 0.35 MM HEIGHT, SOT-1115, SON-6
Contacts6
Reach Compliance Codeunknown
seriesAUP/ULP/V
JESD-30 codeR-PDSO-N6
JESD-609 codee3
length1 mm
Logic integrated circuit typeBUS DRIVER
Humidity sensitivity level1
Number of digits1
Number of functions1
Number of ports2
Number of terminals6
Maximum operating temperature125 °C
Minimum operating temperature-40 °C
Output characteristics3-STATE
Output polarityTRUE
Package body materialPLASTIC/EPOXY
encapsulated codeSON
Package shapeRECTANGULAR
Package formSMALL OUTLINE
Peak Reflow Temperature (Celsius)260
propagation delay (tpd)24 ns
Certification statusNot Qualified
Maximum seat height0.35 mm
Maximum supply voltage (Vsup)3.6 V
Minimum supply voltage (Vsup)0.8 V
Nominal supply voltage (Vsup)1.1 V
surface mountYES
technologyCMOS
Temperature levelAUTOMOTIVE
Terminal surfaceTIN
Terminal formNO LEAD
Terminal pitch0.3 mm
Terminal locationDUAL
Maximum time at peak reflow temperature30
width0.9 mm
74AUP1G126
Low-power buffer/line driver; 3-state
Rev. 4 — 24 November 2011
Product data sheet
1. General description
The 74AUP1G126 provides a single non-inverting buffer/line driver with 3-state output.
The 3-state output is controlled by the output enable input (OE). A LOW level at pin OE
causes the output to assume a high-impedance OFF-state. This device has the
input-disable feature, which allows floating input signals. The inputs are disabled when the
output enable input OE is LOW.
Schmitt-trigger action at all inputs makes the circuit tolerant to slower input rise and fall
times across the entire V
CC
range from 0.8 V to 3.6 V. This device ensures a very low
static and dynamic power consumption across the entire V
CC
range from 0.8 V to 3.6 V.
This device is fully specified for partial power-down applications using I
OFF
. The I
OFF
circuitry disables the output, preventing a damaging backflow current through the device
when it is powered down.
2. Features and benefits
Wide supply voltage range from 0.8 V to 3.6 V
High noise immunity
Complies with JEDEC standards:
JESD8-12 (0.8 V to 1.3 V)
JESD8-11 (0.9 V to 1.65 V)
JESD8-7 (1.2 V to 1.95 V)
JESD8-5 (1.8 V to 2.7 V)
JESD8-B (2.7 V to 3.6 V)
ESD protection:
HBM JESD22-A114F Class 3A exceeds 5000 V
MM JESD22-A115-A exceeds 200 V
CDM JESD22-C101E exceeds 1000 V
Low static power consumption; I
CC
= 0.9
A
(maximum)
Latch-up performance exceeds 100 mA per JESD 78 Class II
Inputs accept voltages up to 3.6 V
Low noise overshoot and undershoot < 10 % of V
CC
Input-disable feature allows floating input conditions
I
OFF
circuitry provides partial power-down mode operation
Multiple package options
Specified from
40 C
to +85
C
and
40 C
to +125
C

74AUP1G126GN Related Products

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Description AUP/ULP/V SERIES, 1-BIT DRIVER, TRUE OUTPUT, PDSO6, 0.90 X 1 MM, 0.35 MM HEIGHT, SOT-1115, SON-6 IC AUP/ULP/V SERIES, 1-BIT DRIVER, TRUE OUTPUT, PDSO5, 1.25 MM, PLASTIC, MO-203, SC-88A, SOT353-1, TSSOP-5, Bus Driver/Transceiver AUP/ULP/V SERIES, 1-BIT DRIVER, TRUE OUTPUT, PDSO6, 1 X 1.45 MM, 0.50 MM HEIGHT, PLASTIC, MO-252, SOT-886, SON-6 AUP/ULP/V SERIES, 1-BIT DRIVER, TRUE OUTPUT, PDSO6, 1 X 1.45 MM, 0.50 MM HEIGHT, PLASTIC, MO-252, SOT-886, SON-6 AUP/ULP/V SERIES, 1-BIT DRIVER, TRUE OUTPUT, PDSO5, 1.25 MM, PLASTIC, MO-203, SC-88A, SOT353-1, TSSOP-5 AUP/ULP/V SERIES, 1-BIT DRIVER, TRUE OUTPUT, PDSO6, 1 X 1 MM, 0.35 MM HEIGHT, SOT-1202, SON-6
package instruction 0.90 X 1 MM, 0.35 MM HEIGHT, SOT-1115, SON-6 1.25 MM, PLASTIC, MO-203, SC-88A, SOT353-1, TSSOP-5 VSON, VSON, TSSOP, 1 X 1 MM, 0.35 MM HEIGHT, SOT-1202, SON-6
Reach Compliance Code unknown compli unknow unknow unknow unknown
series AUP/ULP/V AUP/ULP/V AUP/ULP/V AUP/ULP/V AUP/ULP/V AUP/ULP/V
JESD-30 code R-PDSO-N6 R-PDSO-G5 R-PDSO-N6 R-PDSO-N6 R-PDSO-G5 S-PDSO-N6
JESD-609 code e3 e3 e3 e3 e3 e3
length 1 mm 2.05 mm 1.45 mm 1.45 mm 2.05 mm 1 mm
Logic integrated circuit type BUS DRIVER BUS DRIVER BUS DRIVER BUS DRIVER BUS DRIVER BUS DRIVER
Number of digits 1 1 1 1 1 1
Number of functions 1 1 1 1 1 1
Number of ports 2 2 2 2 2 2
Number of terminals 6 5 6 6 5 6
Maximum operating temperature 125 °C 125 °C 125 °C 125 °C 125 °C 125 °C
Minimum operating temperature -40 °C -40 °C -40 °C -40 °C -40 °C -40 °C
Output characteristics 3-STATE 3-STATE 3-STATE 3-STATE 3-STATE 3-STATE
Output polarity TRUE TRUE TRUE TRUE TRUE TRUE
Package body material PLASTIC/EPOXY PLASTIC/EPOXY PLASTIC/EPOXY PLASTIC/EPOXY PLASTIC/EPOXY PLASTIC/EPOXY
encapsulated code SON TSSOP VSON VSON TSSOP VSON
Package shape RECTANGULAR RECTANGULAR RECTANGULAR RECTANGULAR RECTANGULAR SQUARE
Package form SMALL OUTLINE SMALL OUTLINE, THIN PROFILE, SHRINK PITCH SMALL OUTLINE, VERY THIN PROFILE SMALL OUTLINE, VERY THIN PROFILE SMALL OUTLINE, THIN PROFILE, SHRINK PITCH SMALL OUTLINE, VERY THIN PROFILE
propagation delay (tpd) 24 ns 24 ns 24 ns 24 ns 24 ns 24 ns
Maximum seat height 0.35 mm 1.1 mm 0.5 mm 0.5 mm 1.1 mm 0.35 mm
Maximum supply voltage (Vsup) 3.6 V 3.6 V 3.6 V 3.6 V 3.6 V 3.6 V
Minimum supply voltage (Vsup) 0.8 V 0.8 V 0.8 V 0.8 V 0.8 V 0.8 V
Nominal supply voltage (Vsup) 1.1 V 1.1 V 1.1 V 1.1 V 1.1 V 1.1 V
surface mount YES YES YES YES YES YES
technology CMOS CMOS CMOS CMOS CMOS CMOS
Temperature level AUTOMOTIVE AUTOMOTIVE AUTOMOTIVE AUTOMOTIVE AUTOMOTIVE AUTOMOTIVE
Terminal surface TIN Tin (Sn) TIN TIN TIN TIN
Terminal form NO LEAD GULL WING NO LEAD NO LEAD GULL WING NO LEAD
Terminal pitch 0.3 mm 0.65 mm 0.5 mm 0.5 mm 0.65 mm 0.35 mm
Terminal location DUAL DUAL DUAL DUAL DUAL DUAL
width 0.9 mm 1.25 mm 1 mm 1 mm 1.25 mm 1 mm
Base Number Matches - 1 1 1 1 -
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