HT9246A/B/AL/BL/CL/DL
5-Memory Tone/Pulse Dialer
Features
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Patent Number: 86474, 113235(R.O.C.), 5424740(U.S.A.)
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Universal specification
Operating voltage: 2.0V~5.5V
Low standby current
Low memory retention current: 0.1
µ
A (Typ.)
Tone/pulse switchable
Interface with LCD driver
32 digits for redialing
32 digits for SA memory dialing
One-key redialing
Pause and P
→
T key for PBX
5
×
5 keyboard matrix
Make/Break ratio control
3.58MHz crystal or ceramic resonator
Hand-free control
Hold-line control
Pause, P
→
T can be saved for redialing
Keytone function
Lock function
CD key
Memory number: 5 memories
General Description
The HT9246 series tone/pulse dialers are CMOS
LSIs for telecommunication systems.
The HT9246 series are offered in various pack-
ages from 22-pin DIP to 28-pin DIP. The 22-pin
DIP version is suitable for low cost applications,
while the 28-pin DIP version supplies versatile
functions such as: Hold-line, Hand-free, IDD
lock and LCD dialing number display interface,
all of which are suitable for feature phone appli-
cations.
The HT9246 provides SA, Redial and 3 one-touch
memory dials for speed dialing in either pulse
or tone mode.
Selection Table
Function M
emory Hold- Hand- L CD
Fla
sh
Dialing L ine Free Interface Function
Item
HT9246A
S A,R
EM
1~EM
3
S A,R
EM
1~EM
3
—
—
√
—
Fla
sh
T ime
(m
s)
Inter-
Pulse T one
Dura
tion T one-Pause L ock Package
Function
No.
(ms)
(ms)
N
91
91
—
22 DIP
Control 98/
300/
600
HT9246B
—
—
Control 98/
300/
600
N
91
91
—
√
√
√
√
24 DIP
S A,R
HT9246AL
EM
1~EM
3
S A,R
HT9246BL
EM
1~EM
3
S A,R
HT9246CL
EM
1~EM
3
S A,R
HT9246DL
EM
1~EM
3
—
—
√
—
Control 98/
300/
600
N
91
91
22 DIP
—
—
√
√
Control 98/
300/
600
N
91
91
24 DIP
—
√
—
√
Control 98/
300/
600
N
91
91
24 DIP
Control 98/
300/
600
N
91
91
28 DIP
1
3rd Dec ’97
HT9246A/B/AL/BL/CL/DL
Pin Assignment
Keyboard Information
2
3rd Dec ’97
HT9246A/B/AL/BL/CL/DL
Block Diagram
Pin Description
Pin Name
I/O
Internal
Connection
Description
These pins form a 5
×
5 keyboard matrix which can perform
keyboard input detection. When on-hook (HKS= high) all the
pins are set high. While off-hook the column group (C1~C4)
remains low and the row group (R1~R5) is set high for key
input detection.
An inexpensive single contact 5
×
5 keyboard can be used as an
input device. Pressing a key connects a single column to a
single row, and actuates the system oscillator to result in a
dialing signal output. If more than two keys are pressed at the
same time, no response occurs. The key-in debounce time is
20ms. Refer to the keyboard information for keyboard
arrangement and to the functional description for dialing
specification selection.
C1~C4
R1~R5
I/O
CMOS
IN/OUT
X1
I
X2
O
The system oscillator consists of an inverter, a bias resistor
and the necessary load capacitor on chip. Connecting a
standard 3.579545MHz crystal or ceramic resonator to the X1
OSCILLATOR
and X2 terminals can implement the oscillator function. The
oscillator is turned off in the standby mode, and is actuated
whenever a keyboard entry is detected.
3
3rd Dec ’97
HT9246A/B/AL/BL/CL/DL
Internal
Connection
Pin Name
I/O
Description
XMUTE is a CMOS output structure pulled to VSS during
dialing signal transmission. Otherwise, it remains "high".
XMUTE is used to mute the speech circuit when transmitting
the dial signal.
This pin is used to monitor the status of the hook-switch and
its combination with HFI can control the PO pin output to
make or break the line.
HKS=VDD: On-hook state (PO=low). Except HFI/HDI (hand-
free/hold-line control input), other functions are
all disabled.
HKS=VSS: Off-hook state (PO=high). The chip is in the standby
mode and ready to receive the key input.
This pin is a CMOS output structure which by receiving the
HKS and HFO signals, control the dialer to connect or
disconnect the telephone line.
PO outputs a low to break the line when HKS is high (on-hook)
and HFO is low (hand-free inactive). PO outputs a high to
make the line when HKS is low (off-hook) or HFO is high or
HDO is high.
During the off-hook state, this pin also outputs the dialing
pulse train in pulse mode dialing. While in the tone mode, this
pin is always high.
This is an input pin, used for dialing mode selection, either
Tone mode or Pulse mode, 10pps
MODE=VDD: Pulse mode, 10pps
MODE=VSS: Tone mode
During pulse mode dialing, switching this pin to the tone mode
changes the subsequent digit entry to tone mode. When the
chips are in tone mode, switching to pulse mode will also be
recognized.
MUTE is a CMOS output structure pulled to VDD during Tone
(DTMF) output transmission. Otherwise, it continuously
remains "low".
This is a Make/Break ratio selection pin in pulse mode.
Otherwise, it has no function.
M/B=VDD: Make/Break ratio is 40/60
M/B=VSS: Make/Break ratio is 33/66
This pin is active only when the chip transmits tone dialing
signals. Otherwise, it always outputs a low. The pin outputs
tone signals to drive the external transmitter amplifier circuit.
The load resistor should not be less than 5k
Ω
.
XMUTE
O
CMOS OUT
HKS
I
CMOS IN
Pull-High
PO
O
CMOS OUT
MODE
I
CMOS IN
MUTE
O
CMOS OUT
M/B
I
CMOS IN
DTMF
O
CMOS OUT
4
3rd Dec ’97
HT9246A/B/AL/BL/CL/DL
Internal
Connection
Pin Name
I/O
Description
This pin is a schmitt trigger input structure. Active low.
Applying a negative going pulse to this pin can toggle the
HDO output once.
An external RC network is recommended for input
debouncing. The pull-high resistance is 200k
Ω
typ.
The HDO is a CMOS output structure. Its output is toggle-
controlled by a negative transition on HDI. When HDO is
toggled high, PO keeps high to hold the line. The hold function
can be released by setting HFO high or by an on-off hook
operation or by another HDI input. The HDO pin can directly
drive the HT3810 series melody generators to produce a hold-
line background melody. Refer to the functional description for
the hold-line function.
This pin is a schmitt trigger input structure. Active low.
Applying a negative going pulse to HFI can toggle HFO once
and hence control the hand-free function. The pull-high
resistance of HFI is 200k
Ω
typ.
An external RC network is recommended for input
debouncing.
The HFO is a CMOS output structure. Its output is toggle-
controlled by a negative transition on the HFI pin. When HFO
is high, the hand-free function is enabled and PO outputs a
high to connect the line.
The hand-free function can be released by an on-off-hook
operation or by another HFI input or by setting HDO high.
Refer to the functional description for the hand-free functional
operation.
NMOS open drain output pin. It outputs the BCD code of the
dialing digits to the LCD driver chip (HT16XX series) or
µ
C for
dialing number display. Refer to the functional description for
the detailed timing.
NMOS open drain output. When dialing, it outputs a series of
pulse trains for DOUT data synchronization. DOUT data is
valid at the falling edge of the clock.
Keytone output pin. Outputs a 1.2kHz tone carrier when any
key is pressed in the pulse mode or when the function keys are
pressed in the Tone (DTMF) mode.
For IC test only. TEST=VDD for normal operation
HDI
I
CMOS IN
Pull-High
HDO
O
CMOS OUT
HFI
I
CMOS IN
Pull-High
HFO
O
CMOS OUT
DOUT
O
NMOS OUT
CLOCK
O
NMOS OUT
KT
TEST
O
I
CMOS OUT
CMOS IN
5
3rd Dec ’97
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