DATASHEET
BUFFER/CLOCK DRIVER
Description
The ICSLV810 is a low skew 1.5 V to 2.5 V, 1:10 fanout
buffer. This device is specifically designed for data
communications clock management. The large fanout from
a single input line reduces loading on the input clock. The
TTL level outputs reduce noise levels on the part. Typical
applications are clock and signal distribution.
ICSLV810
Features
•
Packaged in 20-pin QSOP/SSOP
•
Split 1:10 fanout Buffer
•
Maximum skew between outputs of different packages
•
•
•
•
•
•
•
0.75 ns
Max propagation delay of 3.8 ns
Operating voltage of 1.5 V to 2.5 V on Bank A
Operating voltage of 1.5 V to 2.5 V on Banks B and C
Advanced, low power, CMOS process
Industrial temperature range -40° C to +85° C
3.3 V tolerant input when VDDA=2.5 V
Pb (lead) free packaging
Block Diagram
VDDA
CLK 1
CLK 2
CLK 3
CLK 4
CLKIN
CLK 5
CLK 6
CLK 7
CLK 8
CLK 9
CLK 10
VDDB
VDDC
IDT™ / ICS™
BUFFER/CLOCK DRIVER
1
ICSLV810
REV H 051310
ICSLV810
BUFFER/CLOCK DRIVER
FAN OUT BUFFER
Pin Assignment
CLKIN
GND
CLK 1
VDDA
CLK 2
GND
CLK 3
VDDA
CLK 4
GND
1
2
3
4
5
6
7
8
9
10
20
19
18
17
16
15
14
13
12
11
VDDB
CLK 10
CLK 9
GND
CLK 8
VDDC
CLK 7
GND
CLK 6
CLK 5
20 pin (150mil) SSOP
Pin Descriptions
Pin
Number
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
Pin
Name
CLKIN
GND
CLK1
VDDA
CLK2
GND
CLK3
VDDA
CLK4
GND
CLK5
CLK6
GND
CLK7
VDDC
CLK8
GND
CLK9
CLK10
VDDB
Pin
Type
Input
Power
Output
Power
Output
Power
Output
Power
Output
Power
Output
Output
Power
Output
Power
Output
Power
Output
Output
Power
Clock input.
Connect to ground.
Clock output.
Connect to +1.5 - +2.5 V.
Clock output.
Connect to ground.
Clock output.
Connect to +1.5 - +2.5 V.
Clock output.
Connect to ground.
Clock output.
Clock output.
Connect to ground.
Clock output.
Connect to +1.5 - 2.5 V.
Clock output.
Connect to ground.
Clock output.
Clock output.
Connect to +1.5 - 2.5 V.
Pin Description
IDT™ / ICS™
BUFFER/CLOCK DRIVER
2
ICSLV810
REV H 051310
ICSLV810
BUFFER/CLOCK DRIVER
FAN OUT BUFFER
External Components
The ICSLV810 requires a minimum number of external
components for proper operation.
as close to the clock output pin as possible. The nominal
impedance of the clock output is 20Ω
.
PCB Layout Recommendations
For optimum device performance and lowest output phase
noise, the following guidelines should be observed.
1) The 0.01µF decoupling capacitors should be mounted on
the component side of the board as close to the VDD pins
as possible. No vias should be used between the
decoupling capacitors and VDD pins. The PCB trace to VDD
pin should be kept as short as possible, as should the PCB
trace to the ground via.
2) To minimize EMI the 33Ω series termination resistor, if
needed, should be placed close to the clock output.
Decoupling Capacitors
Decoupling capacitors of 0.01µF must be connected
between VDD and GND, as close to these pins as possible.
For optimum device performance, the decoupling capacitors
should be mounted on the component side of the PCB.
Avoid the use of vias in the decoupling circuit.
Series Termination Resistor
When the PCB trace between the clock outputs and the
loads are over 1 inch, series termination should be used. To
series terminate a 50Ω trace (a commonly used trace
impedance) place a 33Ω resistor in series with the clock line,
Absolute Maximum Ratings
Stresses above the ratings listed below can cause permanent damage to the ICSLV810. These ratings, which are
standard values for ICS commercially rated parts, are stress ratings only. Functional operation of the device at
these or any other conditions above those indicated in the operational sections of the specifications is not implied.
Exposure to absolute maximum rating conditions for extended periods can affect product reliability. Electrical
parameters are guaranteed only over the recommended operating temperature range.
Item
Supply Voltage, VDD MAX
All Inputs and Outputs
Ambient Operating Temperature
Storage Temperature
Junction Temperature
Soldering Temperature
7V
Rating
-0.5 V to VDDA + 1.2 V
-40 to +85° C
-65 to +150° C
125° C
260° C
Recommended Operation Conditions
Parameter
Ambient Operating Temperature
Power Supply Voltage (measured with respect to GND), VDDA
Power Supply Voltage (measured with respect to GND), VDDB
Power Supply Voltage (measured with respect to GND), VDDC
Min.
-40
1.425
1.425
1.425
Typ.
Max.
+85
2.625
2.625
2.625
Units
°
C
V
V
V
IDT™ / ICS™
BUFFER/CLOCK DRIVER
3
ICSLV810
REV H 051310
ICSLV810
BUFFER/CLOCK DRIVER
FAN OUT BUFFER
DC Electrical Characteristics—CLKIN and Bank A
VDDA = 2.5 V,
Ambient Temperature -40° C to +85° C
Parameter
Operating Voltage
Quiescent Power Supply
Current
Short Circuit Current
Input High Voltage,
CLKIN
Input Low Voltage,
CLKIN
Output High Voltage
Output Low Voltage
Input High Current
Input Low Current
Input High Current
Input Capacitance
Output Capacitance
Symbol
VDDA
IDDA
I
OS
V
IH
V
IL
V
OH
V
OL
I
IH
I
IL
I
I
C
IN
C
OUT
Conditions
No Load
F = 40 MHz
CLK 1 - 5
Guaranteed
Logic Level
High
Guaranteed
Logic Level Low
VIN = VIH or
VIL
VIN = VIH or
VIL
VDD = max
VDD = max
VDD = max
VIN = 0V, Note1
V
OUT
= 0V,
Note1
I
OH
=
-7 mA
I
OL =
12 mA
VIN = 2.4 V
VIN = 0.5 V
VIN = VDD
(max)
Min.
1.425
Typ.
Max.
2.625
Units
V
mA
mA
V
15
±80
1.6
0.8
1.8
0.4
1
-1
20
5
5.5
6.0
8.0
V
V
V
µA
µA
µA
pF
pF
Note1:
This parameter is not tested, guaranteed by design.
DC Electrical Characteristics—Bank B
VDDB = 2.5 V,
Ambient Temperature -40° C to +85° C, unless otherwise noted
Parameter
Operating Voltage
Quiescent Power
Supply Current
Symbol
VDDB
IDDB
Conditions
VDDB = 2.5 V
No Load
F = 40 MHz
VDDB = 1.5 V
No Load
F = 40 MHz
Min.
1.425
Typ.
Max.
2.625
Units
V
mA
7
3
CLK8-10
CLK8-10
±35
±80
mA
mA
mA
Short Circuit
Current
I
OS
VDDB = 1.5 V
VDDB = 2.5 V
IDT™ / ICS™
BUFFER/CLOCK DRIVER
4
ICSLV810
REV H 051310
ICSLV810
BUFFER/CLOCK DRIVER
FAN OUT BUFFER
Parameter
Output High Voltage
Symbol
V
OH
Conditions
VDDB = 1.5 V
VIN = VIH or VIL
VDDB = 2.5 V
VIN = VIH or VIL
I
OH
=
-7 mA
I
OH
=
-7 mA
I
OL =
12 mA
I
OL =
12 mA
Min.
1.1
1.8
Typ.
Max.
Units
V
V
Output Low Voltage
V
OL
VDDB = 1.5 V
VIN = VIH or VIL
VDDB = 2.5 V
VIN = VIH or VIL
0.42
0.4
1
-1
20
5
5.5
6.0
8.0
V
V
µA
µA
µA
pF
pF
Input High Current
Input Low Current
Input High Current
Input Capacitance
Output Capacitance
I
IH
I
IL
I
I
C
IN
C
OUT
VDDB = max
VDDB = max
VDDB = max,
VIN = VDD (max)
VIN = 0V, Note1
V
OUT
= 0V,
Note 1
Note1:
This parameter is not tested, guaranteed by design.
DC Electrical Characteristics—Bank C
VDDC = 2.5 V,
Ambient Temperature -40° C to +85° C, unless otherwise noted
Parameter
Operating Voltage
Quiescent Power
Supply Current
Symbol
VDDC
IDDC
Conditions
VDDC = 2.5 V
No Load
F = 40 MHz
VDDC = 1.5 V
No Load
F = 40 MHz
Min.
1.425
Typ.
Max.
2.625
Units
V
mA
3
2
CLK6-7
CLK6-7
I
OH
=
-7 mA
I
OH
=
-7 mA
I
OL =
12 mA
I
OL =
12 mA
1.1
1.8
0.42
0.4
1
-1
±35
±80
mA
mA
mA
V
V
V
V
µA
µA
Short Circuit Current
Output High Voltage
I
OS
V
OH
VDDC = 1.5 V
VDDC = 2.5 V
VDDC = 1.5 V
VIN = VIH or VIL
VDDC = 2.5 V
VIN = VIH or VIL
Output Low Voltage
V
OL
VDDC = 1.5 V
VIN = VIH or VIL
VDDC = 2.5 V
VIN = VIH or VIL
Input High Current
Input Low Current
I
IH
I
IL
VDDC = max
VDDC = max
IDT™ / ICS™
BUFFER/CLOCK DRIVER
5
ICSLV810
REV H 051310
stm32/stm8
京公网安备 11010802033920号
EEWORLD
