EEWORLDEEWORLDEEWORLD

Part Number

Search

P1727DG-08-TT

Description
PLL Based Clock Driver, 1727 Series, 1 True Output(s), 0 Inverted Output(s), CMOS, PDSO8, 4.40 MM, GREEN, TSSOP-8
Categorylogic    logic   
File Size328KB,9 Pages
ManufacturerPulseCore Semiconductor Corporation
Download Datasheet Parametric View All

P1727DG-08-TT Overview

PLL Based Clock Driver, 1727 Series, 1 True Output(s), 0 Inverted Output(s), CMOS, PDSO8, 4.40 MM, GREEN, TSSOP-8

P1727DG-08-TT Parametric

Parameter NameAttribute value
MakerPulseCore Semiconductor Corporation
Objectid1756427375
package instruction4.40 MM, GREEN, TSSOP-8
Reach Compliance Codeunknown
compound_id293959010
series1727
Input adjustmentSTANDARD
JESD-30 codeR-PDSO-G8
length4.4 mm
Logic integrated circuit typePLL BASED CLOCK DRIVER
Number of functions1
Number of inverted outputs
Number of terminals8
Actual output times1
Maximum operating temperature70 °C
Minimum operating temperature
Package body materialPLASTIC/EPOXY
encapsulated codeTSSOP
Package shapeRECTANGULAR
Package formSMALL OUTLINE, THIN PROFILE, SHRINK PITCH
Certification statusNot Qualified
Maximum seat height1.1 mm
Maximum supply voltage (Vsup)3.6 V
Minimum supply voltage (Vsup)3 V
Nominal supply voltage (Vsup)3.3 V
surface mountYES
technologyCMOS
Temperature levelCOMMERCIAL
Terminal formGULL WING
Terminal pitch0.65 mm
Terminal locationDUAL
width3 mm
minfmax40 MHz
P1727
Low Power Notebook LCD
Panel EMI Reduction IC
Features
FCC approved method of EMI attenuation
Generates a low EMI spread spectrum of the input
clock frequency
Optimized for frequency range: P1727X: 20MHz to
40MHz
Internal loop filter minimizes external components
and board space
8 different frequency deviations ranging from +/-
0.625% to –3.50%
Low inherent Cycle-to-cycle jitter
3.3V Operating Voltage
Supports notebook VGA and other LCD timing
controller applications
Available in 8 pin SOIC and TSSOP
Qualified for Industrial Temp Spec. (-40°C to
+85°C)
wide reduction of EMI of down stream (clock and data
dependent signals). The P1727 allows significant
system cost savings by reducing the number of circuit
board layers and shielding that are traditionally required
to pass EMI regulations.
The P1727 modulates the output of a single PLL in
order to “spread” the bandwidth of a synthesized clock,
thereby decreasing the peak amplitudes of its
harmonics. This result in significantly lower system EMI
compared to the typical narrow band signal produced
by oscillators and most clock generators. Lowering EMI
by increasing a signal’s bandwidth is called spread
spectrum clock generation.
The P1727 uses the most efficient and optimized
modulation profile approved by the FCC and is
implemented by using a proprietary all-digital method.
Applications
The P1727 is targeted towards notebook LCD displays,
other displays using an LVDS interface, PC peripheral
devices and embedded systems.
Product Description
The P1727 is a versatile spread spectrum frequency
modulator designed specifically for a wide range of
clock frequencies. The P1727 reduces electromagnetic
interference (EMI) at the clock source, allowing system
Block Diagram
PDB
VDD
Modulation
CLKIN
Frequency
Divider
Feedback
Divider
PLL
Phase
Detector
Loop
Filter
VCO
Output
Divider
ModOUT
REFOUT
VSS
©2010 SCILLC. All rights reserved.
JANUARY 2010 – Rev. 1
Publication Order Number:
P1727/D

Technical ResourceMore

EEWorld
subscription
account

EEWorld
service
account

Automotive
development
circle

Robot
development
community

Index Files: 1648  1127  2407  2036  1685  34  23  49  41  4 
Datasheet   0 1 2 3 4 5 6 7 8 9 A B C D E F G H I J K L M N O P Q R S T U V W X Y Z
Room 1530, 15th Floor, Building B, No. 18 Zhongguancun Street, Haidian District, Beijing Telephone: (010) 82350740 Postal Code: 100190
Copyright © 2005-2026 EEWORLD.com.cn, Inc. All rights reserved 京ICP证060456号 京ICP备10001474号-1 电信业务审批[2006]字第258号函 京公网安备 11010802033920号