TS68302DESC01QXC datasheet, PDF

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TS68302DESC01QXC: DescriptionRISC Microcontroller, 16-Bit, 16.67MHz, HCMOS, CPGA132, CERAMIC, PGA-132; CategoryThe embedded processor and controller Microcontrollers and processors; File Size1MB，47 Pages; Manufacturere2v technologies

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TS68302DESC01QXC Overview

RISC Microcontroller, 16-Bit, 16.67MHz, HCMOS, CPGA132, CERAMIC, PGA-132

TS68302DESC01QXC Parametric

Parameter Name	Attribute value
Maker	e2v technologies
Parts packaging code	PGA
package instruction	PGA,
Contacts	132
Reach Compliance Code	compliant
ECCN code	3A001.A.2.C
Has ADC	NO
Address bus width	24
bit size	16
maximum clock frequency	16.67 MHz
DAC channel	NO
DMA channel	YES
External data bus width	16
JESD-30 code	S-CPGA-P132
length	34.544 mm
Number of I/O lines	28
Number of terminals	132
Maximum operating temperature	125 °C
Minimum operating temperature	-55 °C
PWM channel	NO
Package body material	CERAMIC, METAL-SEALED COFIRED
encapsulated code	PGA
Package shape	SQUARE
Package form	GRID ARRAY
Certification status	Not Qualified
Filter level	MIL-PRF-38535 Class Q
Maximum seat height	5.1 mm
speed	16.67 MHz
Maximum supply voltage	5.5 V
Minimum supply voltage	4.5 V
Nominal supply voltage	5 V
surface mount	NO
technology	HCMOS
Temperature level	MILITARY
Terminal form	PIN/PEG
Terminal pitch	2.54 mm
Terminal location	PERPENDICULAR
width	34.544 mm
uPs/uCs/peripheral integrated circuit type	MICROCONTROLLER, RISC

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Features

•

TS68000/TS68008 Microprocessor Core Supporting a 16- or 8-bit TS68000 Family

•

System Integration Block Including:

Independent Direct Memory Access (IDMA) Controller

Interrupt Controller with Two Modes of Operation

Parallel Input/output (I/O) Ports, some with Interrupt Capability

On-chip Usable 1152 bytes of Dual-port Random-access Memory (RAM)

Three Timers, including a Watchdog Timer

Four Programmable Chip-select Lines with Wait-state Logic

Programmable Address Mapping of Dual-port RAM and IMP Registers

On-chip Clock Generator with an Output Clock Signal

System Control:

System Control Register

Bus Arbitration Logic with Low Interrupt Latency Support

Hardware Watchdog for Monitoring Bus Activity

Low Power (Standby) Modes

Disable CPU Logic (TS68000)

Freeze Control for Debugging Selected On-chip Peripherals

DRAM Refresh Controller

•

Communications Processor Including:

– Main Controller (RISC Processor)

– Three Full-duplex Serial Communication Controllers (SCCs)

– Six Serial Direct Memory Access (SDMA) Channels Dedicated to the Three SCCs

– Flexible Physical Interface Accessible by SCCs for Interchip Digital Link (IDL)

General Circuit Interface (GCI, see note), Pulse Code Modulation (PCM), and

Nonmultiplexed Serial Interface (NMSI) Operation

– Serial Communication Port (SCP) for Synchronous Communication, Clock Rate up

to 4.096 MHz

– Serial Management Controllers (SMCs) for IDL and GCI Channels

•

Frequency of Operation: 16.67 MHz

•

Power Supply: 5 V

± 10%

–

Integrated

Multiprotocol

Processor (IMP)

TS68302

Description

The IMP is a very large-scale integration (VLSI) device incorporating the main building

blocks needed for the design of a wide variety of controllers. The device is especially

suitable to applications in the communications industry. The IMP is the first device to

offer the benefits of a closely coupled, industry-standard, TS68000/TS68008 micro-

processor core and a flexible communications architecture. This multichannel

communications device may be configured to support a number of popular industry

interfaces, including those for the integrated services digital network (ISDN) basic rate

and terminal adapter applications. Through a combination of architectural and pro-

grammable features, concurrent operation of different protocols is easily achieved

using the IMP. Data concentrators, line cards, bridges, and gateways are examples of

suitable applications for this versatile device.

The IMP is a high-density complementary metal-oxide semiconductor (HCMOS)

device consisting of a TS68000/TS68008 microprocessor core, a system integration

block (SIB), and a communications processor (CP). The TS68302 block diagram is

shown in Figure 1.

Note:

GCI is sometimes referred to as IOM2.

Rev. 2117A–HIREL–11/02

TS68302DESC01QXC Related Products

	TS68302DESC01QXC	TS68302MA16	TS68302VR16	TS68302DESC01QYA	TS68302MR16	TS68302VA16
Description	RISC Microcontroller, 16-Bit, 16.67MHz, HCMOS, CPGA132, CERAMIC, PGA-132	RISC Microcontroller, 16-Bit, 16.67MHz, HCMOS, CQFP132, CERAMIC, QFP-132	RISC Microcontroller, 16-Bit, 16.67MHz, HCMOS, CPGA132, CERAMIC, PGA-132	RISC Microcontroller, 16-Bit, 16.67MHz, HCMOS, CQFP132, CERAMIC, QFP-132	RISC Microcontroller, 16-Bit, 16.67MHz, HCMOS, CPGA132, CERAMIC, PGA-132	RISC Microcontroller, 16-Bit, 16.67MHz, HCMOS, CQFP132, CERAMIC, QFP-132
Parts packaging code	PGA	QFP	PGA	QFP	PGA	QFP
package instruction	PGA,	QFP,	CERAMIC, PGA-132	QFP,	PGA,	QFP,
Contacts	132	132	132	132	132	132
Reach Compliance Code	compliant	unknow	unknown	compliant	unknown	compliant
Has ADC	NO	NO	NO	NO	NO	NO
Address bus width	24	24	24	24	24	24
bit size	16	16	16	16	16	16
maximum clock frequency	16.67 MHz	16.67 MHz	16.67 MHz	16.67 MHz	16.67 MHz	16.67 MHz
DAC channel	NO	NO	NO	NO	NO	NO
DMA channel	YES	YES	YES	YES	YES	YES
External data bus width	16	16	16	16	16	16
JESD-30 code	S-CPGA-P132	S-CQFP-G132	S-CPGA-P132	S-CQFP-G132	S-CPGA-P132	S-CQFP-G132
length	34.544 mm	22.355 mm	34.544 mm	22.355 mm	34.544 mm	22.355 mm
Number of I/O lines	28	28	28	28	28	28
Number of terminals	132	132	132	132	132	132
Maximum operating temperature	125 °C	125 °C	85 °C	125 °C	125 °C	85 °C
Minimum operating temperature	-55 °C	-55 °C	-40 °C	-55 °C	-55 °C	-40 °C
PWM channel	NO	NO	NO	NO	NO	NO
Package body material	CERAMIC, METAL-SEALED COFIRED	CERAMIC, METAL-SEALED COFIRED	CERAMIC, METAL-SEALED COFIRED	CERAMIC, METAL-SEALED COFIRED	CERAMIC, METAL-SEALED COFIRED	CERAMIC, METAL-SEALED COFIRED
encapsulated code	PGA	QFP	PGA	QFP	PGA	QFP
Package shape	SQUARE	SQUARE	SQUARE	SQUARE	SQUARE	SQUARE
Package form	GRID ARRAY	FLATPACK	GRID ARRAY	FLATPACK	GRID ARRAY	FLATPACK
Certification status	Not Qualified	Not Qualified	Not Qualified	Not Qualified	Not Qualified	Not Qualified
Maximum seat height	5.1 mm	4.52 mm	5.1 mm	4.52 mm	5.1 mm	4.52 mm
speed	16.67 MHz	16.67 MHz	16.67 MHz	16.67 MHz	16.67 MHz	16.67 MHz
Maximum supply voltage	5.5 V	5.5 V	5.5 V	5.5 V	5.5 V	5.5 V
Minimum supply voltage	4.5 V	4.5 V	4.5 V	4.5 V	4.5 V	4.5 V
Nominal supply voltage	5 V	5 V	5 V	5 V	5 V	5 V
surface mount	NO	YES	NO	YES	NO	YES
technology	HCMOS	HCMOS	HCMOS	HCMOS	HCMOS	HCMOS
Temperature level	MILITARY	MILITARY	INDUSTRIAL	MILITARY	MILITARY	INDUSTRIAL
Terminal form	PIN/PEG	GULL WING	PIN/PEG	GULL WING	PIN/PEG	GULL WING
Terminal pitch	2.54 mm	0.64 mm	2.54 mm	0.635 mm	2.54 mm	0.64 mm
Terminal location	PERPENDICULAR	QUAD	PERPENDICULAR	QUAD	PERPENDICULAR	QUAD
width	34.544 mm	22.355 mm	34.544 mm	22.355 mm	34.544 mm	22.355 mm
uPs/uCs/peripheral integrated circuit type	MICROCONTROLLER, RISC	MICROCONTROLLER, RISC	MICROCONTROLLER, RISC	MICROCONTROLLER, RISC	MICROCONTROLLER, RISC	MICROCONTROLLER, RISC
ECCN code	3A001.A.2.C	3A001.A.2.C	-	3A001.A.2.C	3A001.A.2.C	-

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