DATA SHEET
MOS FIELD EFFECT TRANSISTOR
µ
PA1815
P-CHANNEL MOS FIELD EFFECT TRANSISTOR
FOR SWITCHING
DESCRIPTION
The
µ
PA1815 is a switching device which can be
driven directly by a 2.5-V power source.
The
µ
PA1815 features a low on-state resistance and
excellent switching characteristics, and is suitable for
applications such as power switch of portable machine
and so on.
8
PACKAGE DRAWING (Unit : mm)
5
1, 5, 8 : Drain
2, 3, 6, 7: Source
4
: Gate
1.2 MAX.
1.0±0.05
0.25
3°
+5°
–3°
0.1±0.05
0.5
0.6
+0.15
–0.1
FEATURES
•
Can be driven by a 2.5-V power source
•
Low on-state resistance
R
DS(on)1
= 15 mΩ MAX. (V
GS
= –4.5 V, I
D
= –3.5 A)
R
DS(on)2
= 16 mΩ MAX. (V
GS
= –4.0 V, I
D
= –3.5 A)
R
DS(on)3
= 19 mΩ MAX. (V
GS
= –3.3 V, I
D
= –3.5 A)
R
DS(on)4
= 23 mΩ MAX. (V
GS
= –2.5 V, I
D
= –3.5 A)
1
4
0.145 ±0.055
3.15 ±0.15
3.0 ±0.1
6.4 ±0.2
4.4 ±0.1
1.0 ±0.2
ORDERING INFORMATION
PART NUMBER
PACKAGE
Power TSSOP8
0.65
0.27
+0.03
–0.08
0.8 MAX.
0.10 M
0.1
µ
PA1815GR-9JG
ABSOLUTE MAXIMUM RATINGS (T
A
= 25°C)
Drain to Source Voltage
Gate to Source Voltage
5
Drain Current (DC)
Drain Current (pulse)
Note1
Note2
EQUIVALENT CIRCUIT
–20
±12
±7
±26
2.0
150
–55 to +150
V
V
A
A
W
°C
°C
Gate
Protection
Diode
Source
Gate
Drain
V
DSS
V
GSS
I
D(DC)
I
D(pulse)
P
T
T
ch
T
stg
Body
Diode
Total Power Dissipation
Channel Temperature
Storage Temperature
Notes 1.
PW
≤
10
µ
s, Duty Cycle
≤
1 %
2
2.
Mounted on ceramic substrate of 5000 mm x 1.1 mm
Remark
The diode connected between the gate and source of the transistor serves as a protector against ESD.
When this device actually used, an additional protection circuit is externally required if a voltage
exceeding the rated voltage may be applied to this device.
The information in this document is subject to change without notice. Before using this document, please
confirm that this is the latest version.
Not all devices/types available in every country. Please check with local NEC representative for
availability and additional information.
Document No.
D13805EJ2V0DS00 (2nd edition)
Date Published August 1999 NS CP(K)
Printed in Japan
The mark
5
shows major revised points.
©
1998, 1999
µ
PA1815
5
ELECTRICAL CHARACTERISTICS (T
A
= 25 °C)
CHARACTERISTICS
Zero Gate Voltage Drain Current
Gate Leakage Current
Gate to Source Cut-off Voltage
Forward Transfer Admittance
Drain to Source On-state Resistance
SYMBOL
I
DSS
I
GSS
V
GS(off)
| y
fs
|
R
DS(on)1
R
DS(on)2
R
DS(on)3
R
DS(on)4
Input Capacitance
Output Capacitance
Reverse Transfer Capacitance
Turn-on Delay Time
Rise Time
Turn-off Delay Time
Fall Time
Total Gate Charge
Gate to Source Charge
Gate to Drain Charge
Diode Forward Voltage
Reverse Recovery Time
Reverse Recovery Charge
C
iss
C
oss
C
rss
t
d(on)
t
r
t
d(off)
t
f
Q
G
Q
GS
Q
GD
V
F(S-D)
t
rr
Q
rr
TEST CONDITIONS
V
DS
= –20 V, V
GS
= 0 V
V
GS
= ±12 V, V
DS
= 0 V
V
DS
= –10 V, I
D
= –1 mA
V
DS
= –10 V, I
D
= –3.5 A
V
GS
= –4.5 V, I
D
= –3.5 A
V
GS
= –4.0 V, I
D
= –3.5 A
V
GS
= –3.3 V, I
D
= –3.5 A
V
GS
= –2.5 V, I
D
= –3.5 A
V
DS
= –10 V
V
GS
= 0 V
f = 1 MHz
V
DD
= –10 V
I
D
= –3.5 A
V
GS(on)
= –4.0 V
R
G
= 10
Ω
V
DD
= –16 V
I
D
= –7 A
V
GS
= –4.0 V
I
F
= 7 A, V
GS
= 0 V
I
F
= 7 A, V
GS
= 0 V
di/dt = 100 A/
µ
s
–0.5
9
–0.9
19
12
13
14
17
3000
790
410
45
200
140
160
25
5
8.5
0.78
60
45
15
16
19
23
MIN.
TYP.
MAX.
–10
±10
–1.5
UNIT
µ
A
µ
A
V
S
mΩ
mΩ
mΩ
mΩ
pF
pF
pF
ns
ns
ns
ns
nC
nC
nC
V
ns
nC
TEST CIRCUIT 1 SWITCHING TIME
TEST CIRCUIT 2 GATE CHARGE
D.U.T.
D.U.T.
R
L
PG.
R
G
R
G
= 10
Ω
V
DD
I
D
90 %
90 %
I
D
0 10 %
t
d(on)
t
on
t
r
t
d(off)
t
off
10 %
t
f
V
GS
I
G
= 2 mA
V
GS(on)
90 %
V
GS
Wave Form
R
L
V
DD
0
10 %
PG.
50
Ω
V
GS
0
τ
τ
= 1
µ
s
Duty Cycle
≤
1 %
I
D
Wave Form
2
Data Sheet D13805EJ2V0DS00
µ
PA1815
TYPICAL CHARACTERISTICS (T
A
= 25
°
C)
DERATING FACTOR OF FORWARD BIAS
SAFE OPERATING AREA
100
5
−100
FORWARD BIAS SAFE OPERATING AREA
d
ite V)
Lim 4.5
=
I
D
(pulse)
dT - Derating Factor - %
I
D
- Drain Current - A
80
−10
R V
(@
)
(on
DS
GS
PW
10
ms
=1
I
D
(DC)
ms
60
10
0m
s
−1
DC
40
20
T
A
= 25 ˚C
Single Pulse
Mounted on Ceramic
2
−0.01
Substrate of 50cm x 1.1mm
−0.1
0
30
60
90
120
150
−0.1
−1
−10
−100
T
A
- Ambient Temperature -
˚C
V
DS
- Drain to Source Voltage - V
DRAIN CURRENT vs.
DRAIN TO SOURCE VOLTAGE
−30
TRANSFER CHARACTERISTICS
−100
−10
V
DS =
−10
V
I
D
- Drain Current - A
I
D
- Drain Current - A
−20
V
GS
=
−4.5
V
−4.0
V
−3.3
V
−2.5
V
−1
−0.1
−0.01
−0.001
T
A
= 125˚C
75˚C
25˚C
−
25˚C
−10
−0.0001
0
0.0
−0.2
−0.4
−0.6
−0.8
−0.00001
0
−0.5
−1.0
−1.5
−2.0
V
DS
- Drain to Source Voltage - V
GATE TO SOURCE CUT-OFF VOLTAGE vs.
CHANNEL TEMPERATURE
V
GS(off)
- Gate to Source Cut-off Voltage - V
V
GS
- Gate to Sorce Voltage - V
FORWARD TRANSFER ADMMITTANCE Vs.
DRAIN CURRENT
100
| y
fs
| - Forward Transfer Admittance - S
−1.2
V
DS
=
−10
V
I
D
=
−1
mA
V
DS
=
−10V
T
A
=
−25
˚C
25
˚C
−1.0
−0.8
1
75
˚C
125
˚C
−0.6
−0.4
−50
0
50
100
150
0.01
−0.01
−0.1
−1
I
D
- Drain Current - A
−10
−100
T
ch
- Channel Temperature - ˚C
Data Sheet D13805EJ2V0DS00
3
µ
PA1815
R
DS(on)
- Drain to Source On-State Resistance - mΩ
30
R
DS(on)
- Drain to Source On-State Resistance - mΩ
DRAIN TO SOURCE ON-STATE RESISTANCE vs.
DRAIN CURRENT
V
GS
=
−2.5
V
DRAIN TO SOURCE ON-STATE RESISTANCE vs.
DRAIN CURRENT
25
V
GS
=
−3.3
V
25
T
A
= 125˚C
75˚C
25˚C
20
T
A
= 125˚C
20
75˚C
15
25˚C
15
−
25˚C
−
25˚C
10
−0.01
−0.1
−1
−10
−100
10
−0.01
−0.1
−1
−10
−100
I
D
- Drain Current - A
DRAIN TO SOURCE ON-STATE RESISTANCE vs.
DRAIN CURRENT
20
V
GS
=
−4.0
V
T
A
= 125˚C
75˚C
25˚C
I
D
- Drain Current - A
DRAIN TO SOURCE ON-STATE RESISTANCE vs.
DRAIN CURRENT
20
V
GS
=
−4.5
V
T
A
= 125˚C
R
DS(on)
- Drain to Source On-State Resistance - mΩ
15
R
DS(on)
- Drain to Source On-State Resistance - mΩ
15
75˚C
25˚C
−
25˚C
10
10
−
25˚C
5
−0.01
−0.1
−1
−10
−100
5
−0.01
−0.1
−1
−10
−100
I
D
- Drain Current - A
I
D
- Drain Current - A
R
DS (on)
- Drain to Source On-state Resistance - mΩ
30
R
DS (on)
- Drain to Source On-state Resistance - mΩ
DRAIN TO SOURCE ON-STATE RESISTANCE vs.
CHANNEL TEMPERATURE
I
D
=
−3.5
A
V
GS
=
−2.5
V
−3.3
V
−4.0
V
−4.5
V
DRAIN TO SOURCE ON-STATE RESISTANCE vs.
GATE TO SOURCE VOLTAGE
50
I
D
=
−3.5
A
40
20
30
20
10
10
0
−50
T
ch
0
50
100
- Channel Temperature -˚C
150
0
−
2
−
4
−
6
−
8
−
10
−
12
V
GS
- Gate to Source Voltage - V
4
Data Sheet D13805EJ2V0DS00
µ
PA1815
CAPACITANCE vs. DRAIN TO
SOURCE VOLTAGE
10000
SWITCHING CHARACTERISTICS
1000
td
(on)
, tr, td
(off)
, tf - Swwitchig Time - ns
Ciss, Coss, Crss - Capacitance - pF
f = 1 MHz
V
GS
= 0 V
C
iss
td
(off)
100
td
(on)
tr
tf
1000
C
oss
C
rss
100
10
V
DD
=
−10
V
V
GS
(
on
) =
−4.0
V
R
G
= 10
Ω
−1
I
D
- Drain Current - A
−10
10
−1
−10
V
DS
- Drain to Source Voltage - V
−100
1
−0.1
SOURCE TO DRAIN DIODE FORWARD VOLTAGE
100
5
V
GS
- Gate to Source Voltage - V
−10
−8
−6
−4
−2
DYNAMIC INPUT CHARACTERISTICS
I
D
=
−7
A
I
F
- Source to Drain Current - A
10
1
V
DD
=
−16
V
−10
V
0.1
0.01
0.4
0.6
0.8
1.0
1.2
0
V
F(S-D)
- Source to Drain Voltage - V
0
5
10
15
20
Q
g
- Gate Charge - nC
25
30
TRANSIENT THERMAL RESISTANCE vs. PULSE WIDTH
1000
r
th(ch-A)
- Transient Thermal Resistance - ˚C/W
Mounted on ceramic
substrate of 50 cm
2
x 1.1 mm
Single Pulse
100
62.5˚C/W
10
1
0.1
0.001
0.01
0.1
1
PW - Pulse Width - s
10
100
1000
Data Sheet D13805EJ2V0DS00
5
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