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UPD23C16383F9-XXX-BC3

Description
MASK ROM, 1MX16, 90ns, MOS, PBGA48, 8 X 6 MM, FBGA-48
Categorystorage    storage   
File Size106KB,16 Pages
ManufacturerNEC Electronics
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UPD23C16383F9-XXX-BC3 Overview

MASK ROM, 1MX16, 90ns, MOS, PBGA48, 8 X 6 MM, FBGA-48

UPD23C16383F9-XXX-BC3 Parametric

Parameter NameAttribute value
Is it lead-free?Contains lead
Is it Rohs certified?incompatible
MakerNEC Electronics
Parts packaging codeBGA
package instructionTFBGA,
Contacts48
Reach Compliance Codecompliant
ECCN codeEAR99
Maximum access time90 ns
JESD-30 codeR-PBGA-B48
JESD-609 codee0
length8 mm
memory density16777216 bit
Memory IC TypeMASK ROM
memory width16
Number of functions1
Number of terminals48
word count1048576 words
character code1000000
Operating modeASYNCHRONOUS
Maximum operating temperature70 °C
Minimum operating temperature-10 °C
organize1MX16
Package body materialPLASTIC/EPOXY
encapsulated codeTFBGA
Package shapeRECTANGULAR
Package formGRID ARRAY, THIN PROFILE, FINE PITCH
Parallel/SerialPARALLEL
Peak Reflow Temperature (Celsius)NOT SPECIFIED
Certification statusNot Qualified
Maximum seat height1.1 mm
Maximum supply voltage (Vsup)3.6 V
Minimum supply voltage (Vsup)2.7 V
Nominal supply voltage (Vsup)3 V
surface mountYES
technologyMOS
Temperature levelCOMMERCIAL
Terminal surfaceTIN LEAD
Terminal formBALL
Terminal pitch0.8 mm
Terminal locationBOTTOM
Maximum time at peak reflow temperatureNOT SPECIFIED
width6 mm

UPD23C16383F9-XXX-BC3 Preview

PRELIMINARY DATA SHEET
µ
PD23C16343, 23C16383
16M-BIT MASK-PROGRAMMABLE ROM
1M-WORD BY 16-BIT
PAGE ACCESS MODE
MOS INTEGRATED CIRCUIT
Description
The
µ
PD23C16343 and
µ
PD23C16383 are 16,777,216 bits mask-programmable ROM. The word organization is
1,048,576 words by 16 bits.
The active levels of OE (Output Enable Input) can be selected with mask-option.
The
µ
PD23C16343 and
µ
PD23C16383 are packed in 48-pin PLASTIC TSOP(I) and 48-pin TAPE FBGA.
Features
Pin compatible with NOR Flash Memory
Word organization
1,048,576 words by 16 bits
Page access mode
4 word random page access (
µ
PD23C16343)
8 word random page access (
µ
PD23C16383)
Operating supply voltage : V
CC
= 2.7 V to 3.6 V
Input / output supply voltage : V
CC
Q = 1.65 V to 1.95 V
Operating supply
voltage
V
CC
Access time /
Page access time
ns (MAX.)
Power supply current
(Active mode)
mA (MAX.)
Standby current
(CMOS level input)
µ
A (MAX.)
µ
PD23C16343
3.3 V
±
0.3 V
3.0 V
±
0.3 V
85 / 25
90 / 25
40
µ
PD23C16383
55
30
The information in this document is subject to change without notice. Before using this document, please
confirm that this is the latest version.
Not all devices/types available in every country. Please check with local NEC representative for
availability and additional information.
Document No. M15710EJ1V0DS00 (1st edition)
Date Published October 2001 NS CP(K)
Printed in Japan
©
2001
µ
PD23C16343, 23C16383
Ordering Information
Part Number
Package
48-pin PLASTIC TSOP(I) (12 x 20) (Normal bent)
48-pin TAPE FBGA (8 x 6)
48-pin PLASTIC TSOP(I) (12 x 20) (Normal bent)
48-pin TAPE FBGA (8 x 6)
µ
PD23C16343GZ-xxx-MJH
µ
PD23C16343F9-xxx-BC3
µ
PD23C16383GZ-xxx-MJH
µ
PD23C16383F9-xxx-BC3
(xxx : ROM code suffix No.)
2
Preliminary Data Sheet M15710EJ1V0DS
µ
PD23C16343, 23C16383
Pin Configurations (Marking Side)
/xxx indicates active low signal.
48-pin PLASTIC TSOP(I) (12 x 20) (Normal bent)
[
µ
PD23C16343GZ-xxx-MJH ]
[
µ
PD23C16383GZ-xxx-MJH ]
A15
A14
A13
A12
A11
A10
A9
A8
A19
NC
NC
NC
NC
NC
NC
A18
A17
A7
A6
A5
A4
A3
A2
A1
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
48
47
46
45
44
43
42
41
40
39
38
37
36
35
34
33
32
31
30
29
28
27
26
25
A16
V
CC
Q
GND
O15
O7
O14
O6
O13
O5
O12
O4
V
CC
O11
O3
O10
O2
O9
O1
O8
O0
/OE, OE, DC
GND
/CE
A0
A0 - A19
O0 - O15
/CE
/OE, OE
V
CC
V
CC
Q
GND
NC
DC
Note
: Address inputs
: Data outputs
: Chip Enable
: Output Enable
: Supply voltage
: Input / output supply voltage
: Ground
: No Connection
: Don’t Care
Note
Some signals can be applied because this pin is not connected to the inside of the chip.
Remark
Refer to
Package Drawings
for the 1-pin index mark.
Preliminary Data Sheet M15710EJ1V0DS
3
µ
PD23C16343, 23C16383
48-pin TAPE FBGA (8 x 6)
[
µ
PD23C16343F9-xxx-BC3 ]
[
µ
PD23C16383F9-xxx-BC3 ]
Top View
Bottom View
6
5
4
3
2
1
A
B
C
D
E
F
G
H
H
G
F
E
D
C
B
A
A
6
5
4
3
2
1
A13
A9
NC
NC
A7
A3
B
A12
A8
NC
NC
A17
A4
C
A14
A10
NC
A18
A6
A2
D
A15
A11
A19
NC
A5
A1
E
A16
O7
O5
O2
O0
A0
F
V
CC
Q
O14
O12
O10
O8
/CE
G
O15
O13
V
CC
O11
O9
/OE, OE
H
GND
O6
O4
O3
O1
GND
6
5
4
3
2
1
H
GND
O6
O4
O3
O1
GND
G
O15
O13
V
CC
O11
O9
/OE, OE
F
V
CC
Q
O14
O12
O10
O8
/CE
E
A16
O7
O5
O2
O0
A0
D
A15
A11
A19
NC
A5
A1
C
A14
A10
NC
A18
A6
A2
B
A12
A8
NC
NC
A17
A4
A
A13
A9
NC
NC
A7
A3
A0 - A19
O0 - O15
/CE
/OE, OE
V
CC
V
CC
Q
GND
NC
DC
Note
: Address inputs
: Data outputs
: Chip Enable
: Output Enable
: Supply voltage
: Input / output supply voltage
: Ground
: No Connection
: Don’t Care
Note
Some signals can be applied because this pin is not connected to the inside of the chip.
Remark
Refer to
Package Drawings
for the index mark.
4
Preliminary Data Sheet M15710EJ1V0DS
µ
PD23C16343, 23C16383
Input / Output Pin Functions
Pin name
A0 to A19
(Address inputs)
O0 to O15
(Data outputs)
/CE
(Chip Enable)
Input
Output
Input / Output
Input
Address input pins.
A0 to A19 are used as 20 bits address signals.
Data output pins.
16 bits data outputs to O0 to O15.
Chip activating signal.
When the OE is active, output states are following.
High level
: High impedance
Low level
: Data out
/OE, OE, DC
(Output Enable, Don't care)
V
CC
V
CC
Q
GND
NC
Input
Output enable signal. The active level of OE is mask option. The active level of OE
can be selected from high active, low active and Don’t care at order.
Supply voltage
Input / output supply voltage
Ground
Not internally connected. (The signal can be connected.)
Function
Preliminary Data Sheet M15710EJ1V0DS
5

UPD23C16383F9-XXX-BC3 Related Products

UPD23C16383F9-XXX-BC3 UPD23C16343F9-XXX-BC3 UPD23C16343GZ-XXX-MJH UPD23C16383GZ-XXX-MJH
Description MASK ROM, 1MX16, 90ns, MOS, PBGA48, 8 X 6 MM, FBGA-48 MASK ROM, 1MX16, 90ns, MOS, PBGA48, 8 X 6 MM, FBGA-48 MASK ROM, 1MX16, 90ns, MOS, PDSO48, 12 X 20 MM, PLASTIC, TSOP1-48 MASK ROM, 1MX16, 90ns, MOS, PDSO48, 12 X 20 MM, PLASTIC, TSOP1-48
Is it lead-free? Contains lead Contains lead Contains lead Contains lead
Is it Rohs certified? incompatible incompatible incompatible incompatible
Maker NEC Electronics NEC Electronics NEC Electronics NEC Electronics
Parts packaging code BGA BGA TSOP1 TSOP1
package instruction TFBGA, TFBGA, TSOP1, TSOP1,
Contacts 48 48 48 48
Reach Compliance Code compliant compliant compli compli
ECCN code EAR99 EAR99 EAR99 EAR99
Maximum access time 90 ns 90 ns 90 ns 90 ns
JESD-30 code R-PBGA-B48 R-PBGA-B48 R-PDSO-G48 R-PDSO-G48
JESD-609 code e0 e0 e0 e0
length 8 mm 8 mm 18.4 mm 18.4 mm
memory density 16777216 bit 16777216 bit 16777216 bi 16777216 bi
Memory IC Type MASK ROM MASK ROM MASK ROM MASK ROM
memory width 16 16 16 16
Number of functions 1 1 1 1
Number of terminals 48 48 48 48
word count 1048576 words 1048576 words 1048576 words 1048576 words
character code 1000000 1000000 1000000 1000000
Operating mode ASYNCHRONOUS ASYNCHRONOUS ASYNCHRONOUS ASYNCHRONOUS
Maximum operating temperature 70 °C 70 °C 70 °C 70 °C
Minimum operating temperature -10 °C -10 °C -10 °C -10 °C
organize 1MX16 1MX16 1MX16 1MX16
Package body material PLASTIC/EPOXY PLASTIC/EPOXY PLASTIC/EPOXY PLASTIC/EPOXY
encapsulated code TFBGA TFBGA TSOP1 TSOP1
Package shape RECTANGULAR RECTANGULAR RECTANGULAR RECTANGULAR
Package form GRID ARRAY, THIN PROFILE, FINE PITCH GRID ARRAY, THIN PROFILE, FINE PITCH SMALL OUTLINE, THIN PROFILE SMALL OUTLINE, THIN PROFILE
Parallel/Serial PARALLEL PARALLEL PARALLEL PARALLEL
Peak Reflow Temperature (Celsius) NOT SPECIFIED NOT SPECIFIED NOT SPECIFIED NOT SPECIFIED
Certification status Not Qualified Not Qualified Not Qualified Not Qualified
Maximum seat height 1.1 mm 1.1 mm 1.2 mm 1.2 mm
Maximum supply voltage (Vsup) 3.6 V 3.6 V 3.6 V 3.6 V
Minimum supply voltage (Vsup) 2.7 V 2.7 V 2.7 V 2.7 V
Nominal supply voltage (Vsup) 3 V 3 V 3 V 3 V
surface mount YES YES YES YES
technology MOS MOS MOS MOS
Temperature level COMMERCIAL COMMERCIAL COMMERCIAL COMMERCIAL
Terminal surface TIN LEAD TIN LEAD TIN LEAD TIN LEAD
Terminal form BALL BALL GULL WING GULL WING
Terminal pitch 0.8 mm 0.8 mm 0.5 mm 0.5 mm
Terminal location BOTTOM BOTTOM DUAL DUAL
Maximum time at peak reflow temperature NOT SPECIFIED NOT SPECIFIED NOT SPECIFIED NOT SPECIFIED
width 6 mm 6 mm 12 mm 12 mm
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