EEWORLDEEWORLDEEWORLD

Part Number

Search

531BC90M0000DG

Description
LVDS Output Clock Oscillator, 90MHz Nom, ROHS COMPLIANT, SMD, 6 PIN
CategoryPassive components    oscillator   
File Size215KB,12 Pages
ManufacturerSilicon Laboratories Inc
Environmental Compliance  
Download Datasheet Parametric View All

531BC90M0000DG Overview

LVDS Output Clock Oscillator, 90MHz Nom, ROHS COMPLIANT, SMD, 6 PIN

531BC90M0000DG Parametric

Parameter NameAttribute value
Is it lead-free?Lead free
Is it Rohs certified?conform to
MakerSilicon Laboratories Inc
Reach Compliance Codeunknown
Other featuresTRAY
maximum descent time0.35 ns
Frequency Adjustment - MechanicalNO
frequency stability7%
JESD-609 codee4
Manufacturer's serial number531
Installation featuresSURFACE MOUNT
Nominal operating frequency90 MHz
Maximum operating temperature85 °C
Minimum operating temperature-40 °C
Oscillator typeLVDS
physical size7.0mm x 5.0mm x 1.85mm
longest rise time0.35 ns
Maximum supply voltage3.63 V
Minimum supply voltage2.97 V
Nominal supply voltage3.3 V
surface mountYES
maximum symmetry55/45 %
Terminal surfaceNickel/Gold (Ni/Au)
S i 5 3 0 / 5 31
R
EVISION
D
C
R Y S TA L
O
S C I L L A T O R
(XO)
(10 M H
Z T O
1.4 G H
Z
)
Features
Available with any-rate output
frequencies from 10 MHz to 945 MHz
and select frequencies to 1.4 GHz
3rd generation DSPLL
®
with superior
jitter performance
3x better frequency stability than
SAW-based oscillators
Internal fixed crystal frequency
ensures high reliability and low
aging
Available CMOS, LVPECL,
LVDS, and CML outputs
3.3, 2.5, and 1.8 V supply options
Industry-standard 5 x 7 mm
package and pinout
Pb-free/RoHS-compliant
Si5602
Ordering Information:
See page 7.
Applications
SONET/SDH
Networking
SD/HD video
Test and measurement
Clock and data recovery
FPGA/ASIC clock generation
Pin Assignments:
See page 6.
(Top View)
NC
OE
GND
1
2
3
6
5
4
V
DD
Description
The Si530/531 XO utilizes Silicon Laboratories’ advanced DSPLL circuitry
to provide a low jitter clock at high frequencies. The Si530/531 is available
with any-rate output frequency from 10 to 945 MHz and select frequencies to
1400 MHz. Unlike a traditional XO, where a different crystal is required for
each output frequency, the Si530/531 uses one fixed crystal to provide a
wide range of output frequencies. This IC based approach allows the crystal
resonator to provide exceptional frequency stability and reliability. In addition,
DSPLL clock synthesis provides superior supply noise rejection, simplifying
the task of generating low jitter clocks in noisy environments typically found in
communication systems. The Si530/531 IC based XO is factory configurable
for a wide variety of user specifications including frequency, supply voltage,
output format, and temperature stability. Specific configurations are factory
programmed at time of shipment, thereby eliminating long lead times
associated with custom oscillators.
®
CLK–
CLK+
Si530 (LVDS/LVPECL/CML)
OE
NC
GND
1
2
3
6
5
4
V
DD
Functional Block Diagram
V
DD
CLK– CLK+
NC
CLK
Si530 (CMOS)
Fixed
Frequency
XO
Any-rate
10–1400 MHz
DSPLL
®
Clock
Synthesis
OE
NC
GND
1
2
3
6
5
4
V
DD
CLK–
CLK+
Si531 (LVDS/LVPECL/CML)
OE
GND
Rev. 1.1 6/07
Copyright © 2007 by Silicon Laboratories
Si530/531
My posts 0 views, 0 replies
Original post address [url=https://bbs.eeworld.com.cn/thread-496869-1-1.html]https://bbs.eeworld.com.cn/thread-496869-1-1.html[/url] I looked in the forum and found 0 views and 0 replies.I opened the ...
suoma Talking
Positive and negative power supplies made by myself
[i=s] This post was last edited by paulhyde on 2014-9-15 03:05 [/i] A power supply that can output positive and negative 12 volts and positive and negative 5 volts. I made this circuit myself....
songping97629 Electronics Design Contest
Waveform Generator
Help meRequirements: Use 51 single chip microcomputer and dac0832 to design square wave, sawtooth wave, triangle wave, trapezoidal wave, and the waveform polarity period is variableRequest code schema...
matter MCU
Push-pull circuit
Why is the lower arm PNP transistor of the H-bridge push-pull circuit often damaged, and the three legs of the transistor are directly short-circuited?...
cxq742536574 Analog electronics
Comparison between FPGA and CPLD (Altera)
Altera's FPGA and CPLD structure and performance comparison:Hardware Comparison between FPGA and CPLDComparison of the characteristics of FPGA and CPLD...
cdy200824 FPGA/CPLD
How can a hybrid hardware engineer who doesn't know embedded programming prove that he has mastered common communication interfaces?
As the title says, everyone is welcome to chat. For example, for commonly used interfaces such as RS485, IIC, SPI, CAN, etc., do you know the common circuit structure and electrical level range, such ...
呜呼哀哉 Analog electronics

EEWorld
subscription
account

EEWorld
service
account

Automotive
development
circle

Robot
development
community

Index Files: 759  2076  789  681  1614  16  42  14  33  12 
Datasheet   0 1 2 3 4 5 6 7 8 9 A B C D E F G H I J K L M N O P Q R S T U V W X Y Z
Room 1530, 15th Floor, Building B, No. 18 Zhongguancun Street, Haidian District, Beijing Telephone: (010) 82350740 Postal Code: 100190
Copyright © 2005-2026 EEWORLD.com.cn, Inc. All rights reserved 京ICP证060456号 京ICP备10001474号-1 电信业务审批[2006]字第258号函 京公网安备 11010802033920号