www.murata-ps.com
LSN-10A D3 Models
Single Output, Non-Isolated, 3.3V
IN
, 1-2.5V
OUT,
10A, DC/DC's in SIP Packages
Typical Units
Features
■
■
■
■
■
Industry-standard SIP pinout
Shorter (2.0" vs. 2.5") package length
3.0-3.6V input range
1/1.2/1.25/1.5/1.8/2/2.5V outputs @ 10A
Non-isolated, fully synchronous,
300kHz, buck topology
Outstanding performance:
•
±1% setpoint accuracy
•
Efficiencies to 94% @ 10 Amps
•
Noise as low as 10mVp-p
•
Stable no-load operation
•
Trimmable output voltage
Remote on/off and sense pins
Thermal Shutdown
No derating to +71°C, natural convection
UL/IEC/EN60950 certified
EMC compliant
■
■
■
■
■
■
DATEL’s new LSN D3 Series SIP’s (single-in-line packages) are
non-isolated DC/DC converters that accept a 3.3V input (3.0V to 3.6V
input range) and deliver 1V, 1.2V, 1.25V, 1.5V, 1.8V, 2V or 2.5V out-
puts at 10 Amps. LSN D3 SIP’s are designed to take on-board 3.3V
power and convert it, with the highest efficiency in the smallest space,
to any lower voltage required by today’s current-hungry DSP’s, ASIC’s
and CPLD’s.
The miniature size of LSN D3's makes them ideal for true point-of-use power
processing. Vertical-mount packages occupy a mere 0.7 square inches (440 sq.
mm), and they are available in industry-standard and Tyco-compatible pinout.
Horizontal-mount packages ("H" suffix) are only 0.34 inches (8.6mm) high.
The LSN's best-in-class power density is achieved with a fully synchronous,
fixed-frequency (300kHz), buck topology that also delivers: high efficiency (94% for
2.5V
OUT
models), low noise (10mVp-p typ.), tight line/load regulation (±0.1%/±0.25%
max.), quick step response (100µsec), stable no-load operation, and no output
reverse conduction.
The fully functional LSN’s feature output overcurrent detection, continuous short-
circuit protection, an output-voltage trim function, a remote on/off control pin
(pull high to disable), thermal shutdown, and a sense pin. High efficiency enables the
LSN D3's to deliver rated output currents of 10 Amps at ambient temperatures to
+71°C with no air flow (natural convection).
If your low-voltage, high-current requirements have made the use of inefficient
linear regulators impractical, take a look at one of DATEL’s easy-to-use, low-cost
LSN SIP’s. All devices are UL/IEC/EN60950 certified and EMC compliant. UL, CB,
HALT and EMC reports are available upon request.
+INPUT
(7,8)
10.5Ω
330µF
44µF
+OUTPUT
(1,2,4)
47.1µF
470µF
+SENSE
➀
(3)
COMMON
(5)
COMMON
(6)
VOLTAGE
BOOST
CURRENT
SENSE
V
CC
ON/OFF
CONTROL
(11)
PWM
CONTROLLER
REFERENCE &
ERROR AMP
Typical topology is shown
TRIM
(10)
Figure 1. Simplified Schematic
➀
For devices with the sense-pin removed ("B" suffix),
the feedback path is through the +Output pin and not
the +Sense pin.
For full details go to
www.murata-ps.com/rohs
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MDC_LSN10A-D3.D02
Page 1 of 14
LSN-10A D3 Models
Single Output, Non-Isolated, 3.3V
IN
, 1-2.5V
OUT,
10A, DC/DC's in SIP Packages
Performance Specifications and Ordering Guide
Root Model
➄
LSN-1/10-D3-C
LSN-1.2/10-D3-C
LSN-1.25/10-D3-C
LSN-1.5/10-D3-C
LSN-1.8/10-D3-C
LSN-1.8/10-D3HJHL2-C
LSN-2/10-D3-C
LSN-2.5/10-D3-C
➀
Regulation (Max.)
➂
V
IN
Nom.
(Volts)
Line
Load
±0.1%
±0.25%
3.3
±0.1%
±0.25%
3.3
±0.1%
±0.25%
3.3
±0.1%
±0.25%
3.3
±0.1%
±0.25%
3.3
±0.1%
±0.25%
3.3
±0.1%
±0.25%
3.3
±0.1%
±0.25%
3.3
Input
Range
(Volts)
3.0-3.6
3.0-3.6
3.0-3.6
3.0-3.6
3.0-3.6
3.0-3.6
3.0-3.6
3.0-3.6
I
IN
➃
(mA/A)
70/3.73
70/4.42
60/4.30
70/5.47
70/6.33
70/6.33
70/6.96
70/8.50
Efficiency
Full Load
Min.
Typ.
83.5%
86.5%
85%
88%
85%
88%
87.5%
90%
89%
91.5%
89%
91.5%
89.5%
92.5%
91%
94%
½ Load
Typ.
90.5%
91%
91%
92.2%
93.5%
93.5%
94%
95.5%
Package
(Case,
Pinout)
B7/B7x, P59
B7/B7x, P59
B7/B7x, P59
B7/B7x, P59
B7/B7x, P59
B7/B7x, P59
B7/B7x, P59
B7/B7x, P59
V
OUT
(Volts)
1
1.2
1.25
1.5
1.8
1.8
2
2.5
I
OUT
(Amps)
10
10
10
10
10
10
10
10
Output
R/N (mVp-p)
➁
Typ.
Max.
10
35
10
35
10
35
10
35
10
35
10
35
10
35
10
35
➀
Typical at T
A
= +25°C under nominal line voltage and full-load conditions, unless otherwise
noted. All models are tested and specified with external 22µF input and output capacitors.
These capacitors are necessary to accommodate our test equipment and may not be required
to achieve specified performance in your applications. See I/O Filtering and Noise Reduction.
➁
Ripple/Noise (R/N) is tested/specified over a 20MHz bandwidth and may be reduced with
external filtering. See I/O Filtering and Noise Reduction for details.
P A R T
N U M B E R
S T R U C T U R E
➂
These devices have no minimum-load requirements and will regulate under no-load conditions.
Regulation specifications describe the output-voltage deviation as the line voltage or load is
varied from its nominal/midpoint value to either extreme.
➃
Nominal line voltage, no-load/full-load conditions.
➄
These are not complete model numbers. Please refer to the Part Number Structure for
additional options when ordering.
M E C H A N I C A L
S P E C I F I C A T I O N S
2.00
(50.8)
0.17
(4.3)
0.34
(8.6)
0.20
(5.1)
0.50
(12.7)
L SN
-
1.8
/
10
-
D3 B H J
-
C
Output
Configuration:
L
= Unipolar
Low Voltage
Non-Isolated SIP
Nominal Output Voltage:
1, 1.2, 1.25, 1.5, 1.8, 2, or 2.5 Volts
Maximum Rated Output
Current in Amps
See page 12 for
Part Number Structure
and ordering details.
RoHS-6 compliant
J Suffix:
Reversed Pin
Vertical Mount
H Suffix:
Horizontal Mount
B Suffix:
No Remote Sense
(Pin 3 removed)
1 2 3 4 5
6 7 8 9 10 11
0.030 ±0.001 DIA.
(0.762 ±0.025)
0.400
(10.16)
4 EQ. SP. @
0.100 (2.54)
1.000
(25.40)
0.500
(12.70)
5 EQ. SP. @
0.100 (2.54)
0.05
(1.3)
0.110
(2.8)
0.046
(1.2)
Input Voltage Range:
D3
= 3 to 3.6 Volts
(3.3V nominal)
0.35
(8.9)
0.21
(5.3)
0.50
(12.7)
ISOLATING
PAD
LAYOUT PATTERN
TOP VIEW
0.25
(6.4)
2.00
(50.8)
0.17
(4.3)
1 2 3 4 5
6 7 8 9 10 11
0.34
(8.6)
Case B7
Vertical Mounting
(Standard)
2.00
(50.8)
0.05
(1.3)
1 2 3 4 5
6 7 8 9 10 11
0.36
(9.1)
0.20
(5.1)
0.50
(12.7)
0.030 ±0.001 DIA.
(0.762 ±0.025)
0.400
(10.16)
4 EQ. SP. @
0.100 (2.54)
0.56
(14.2)
1.000
(25.40)
0.500
(12.70)
5 EQ. SP. @
0.100 (2.54)
0.05
(1.3)
0.360
(9.1)
0.16
(4.1)
0.030 ±0.001 DIA.
(0.762 ±0.025)
0.400
(10.16)
4 EQ. SP. @
0.100 (2.54)
1.000
(25.40)
0.500
(12.70)
5 EQ. SP. @
0.100 (2.54)
0.05
(1.3)
0.046
(1.2)
0.106
(2.7)
0.53
(13.5)
Case B7A
Horizontal Mounting
0.306
(7.8)
LAYOUT PATTERN
TOP VIEW
0.36
(9.1)
Case B7B
Reverse Pin
Vertical Mounting
(Tyco/Lineage-compatible)
0.45
(11.4)
LAYOUT PATTERN
TOP VIEW
0.50
(12.7)
Standard model pin
lengths are shown.
RECOMMENDED
COPPER PAD
ON PCB (0.55 SQ. IN.)
Dimensions are in inches (mm shown for ref. only).
Third Angle Projection
Pin
1
2
3
4
Function P59*
+Output
+Output
+Sense *
+Output
I/O Connections
Pin
Function P59*
5
Common
6
Common
7
+Input
8
+Input
Pin
9
10
11
Function P59*
No Pin
V
OUT
Trim
On/Off Control
* Pin 3 (+Sense) removed
for "B" suffix models.
Tolerances (unless otherwise specified):
.XX ± 0.02 (0.5)
.XXX ± 0.010 (0.25)
Angles ± 2˚
Components are shown for reference only.
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MDC_LSN10A-D3.D02
Page 2 of 14
LSN-10A D3 Models
Performance/Functional Specifications
Input
Input Voltage Range
Input Current:
Normal Operating Conditions
Inrush Transient
Standby/Off Mode
Output Short-Circuit Condition
➁
Input Reflected Ripple Current
➁
Input Filter Type
Overvoltage Protection
Reverse-Polarity Protection
Undervoltage Shutdown
Sense Range
On/Off Control
➁ ➂
3.0 to 3.6 Volts (3.3V nominal)
See Ordering Guide
0.02A
2
sec
3mA
70mA average
50mAp-p
Capacitive (374µF)
None
None, install external fuse
None
10% of V
OUT
On = open (internal pulldown)
Off = +2.8V to +V
IN
(<3mA)
Storage Temperature
Lead Temperature
(soldering, 10 sec.)
Single Output, Non-Isolated, 3.3V
IN
, 1-2.5V
OUT,
10A, DC/DC's in SIP Packages
Absolute Maximum Ratings
Input Voltage:
Continuous or transient
On/Off Control
(Pin 11)
Input Reverse-Polarity Protection
Output Overvoltage Protection
Output Current
6 Volts
+V
IN
None, install external fuse
None
Current limited. Devices can
withstand sustained output short
circuits without damage.
–40 to +125°C
+300°C
Typical @ T
A
= +25°C under nominal line voltage and full-load conditions unless noted.
➀
These are stress ratings. Exposure of devices to greater than any of these conditions may
adversely affect long-term reliability. Proper operation under conditions other than those
listed in the Performance/Functional Specifications Table is not implied.
T E C H N I C A L
N O T E S
Output
V
OUT
Accuracy
(50% load)
Minimum Loading
➀
Maximum Capacitive Load
V
OUT
Trim Range
➁
Ripple/Noise
(20MHz BW)
➀ ➁ ➃
Temperature Coefficient
Total Accuracy
Efficiency
➁
±1% maximum
No load
10,000µF (electrolytic)
±10%
See Ordering Guide
±0.02%/°C
3% over line/load/temperature
See Ordering Guide
Return Current Paths
The LSN D3 SIP’s are non-isolated DC/DC converters. Their two Common
pins (pins 5 and 6) are connected to each other internally (see Figure 1). To
the extent possible (with the intent of minimizing ground loops), input return
current should be directed through pin 6 (also referred to as –Input or
Input Return), and output return current should be directed through pin 5
(also referred to as –Output or Output Return). Any on/off control signals
applied to pin 11 (On/Off Control) should be referenced to Common
(specifically pin 6).
I/O Filtering and Noise Reduction
All models in the LSN D3 Series are tested and specified with external 22µF
input and output capacitors. These capacitors are necessary to accommodate
our test equipment and may not be required to achieved desired performance
in your application. The LSN D3's are designed with high-quality, high-per-
formance
internal
I/O caps, and will operate within spec in most applications
with
no additional external components.
In particular, the LSN D3's input capacitors are specified for low ESR
and are fully rated to handle the units' input ripple currents. Similarly, the
internal output capacitors are specified for low ESR and full-range frequency
response. As shown in the Performance Curves, removal of the external
output caps has minimal effect on output noise.
In critical applications, input/output ripple/noise may be further reduced using
filtering techniques, the simplest being the installation of external I/O caps.
External input capacitors serve primarily as energy-storage devices. They
minimize high-frequency variations in input voltage (usually caused by IR
drops in conductors leading to the DC/DC) as the switching converter draws
pulses of current. Input capacitors should be selected for bulk capacitance (at
appropriate frequencies), low ESR, and high rms-ripple-current ratings. The
switching nature of modern DC/DC's requires that the dc input voltage
source have low ac impedance at the frequencies of interest. Highly inductive
source impedances can greatly affect system stability. Your specific system
configuration may necessitate additional considerations.
Output ripple/noise (also referred to as periodic and random deviations
or PARD) may be reduced below specified limits with the installation of
additional external output capacitors. Output capacitors function as true filter
Overcurrent Detection and Short-Circuit Protection:
➁
Current-Limiting Detection Point
16 (12.5 to 22) Amps
Short-Circuit Detection Point
98% of V
OUT
set
SC Protection Technique
Hiccup with auto recovery
Short-Circuit Current
600mA average
Dynamic Characteristics
Transient Response
(50% load step)
Start-Up Time:
➁
V
IN
to V
OUT
On/Off to V
OUT
Switching Frequency
MTBF
➄
100µsec to ±2% of final value
7msec
6msec
300kHz (+40kHz, –50kHz)
Environmental
2.1 million hours
Operating Temperature:
(Ambient)
➁
–40 to +85°C with Derating
See Derating Curves
Thermal Shutdown
Dimensions
Pin Dimensions/Material
Weight
Flamability Rating
Safety
+115°C
Physical
See Mechanical Specifications
0.03" (0.76mm) round copper alloy with
tin plate over nickel underplate
0.3 ounces (8.5g)
UL94V-0
UL/cUL/IEC/EN 60950-1, CSA-C22.2 No. 234
➀
All models are tested/specified with external 22µF input/output capacitors.These caps
accommodate our test equipment and may not be required to achieve specified performance
in your applications. All models are stable and regulate within spec under no-load conditions.
➁
See Technical Notes and Performance Curves for details.
➂
The On/Off Control (pin 11) is designed to be driven with open-collector logic or the appli-
cation of appropriate voltages (referenced to Common, pins 5 and 6).
➃
Output noise may be further reduced with the installation of additional external output
filtering. See I/O Filtering and Noise Reduction.
➄
Calculated using the Telcordia (Bellcore) SR-332 Method 1, Case 3, ground fixed conditions,
T
A
= +25°C, full load, natural convection, +55°C component temperature.
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MDC_LSN10A-D3.D02
Page 3 of 14
LSN-10A D3 Models
Single Output, Non-Isolated, 3.3V
IN
, 1-2.5V
OUT,
10A, DC/DC's in SIP Packages
elements and should be selected for bulk capacitance, low ESR, and appro-
priate frequency response. Any scope measurements of PARD should be
made directly at the DC/DC output pins with scope probe ground less than
0.5" in length.
All external capacitors should have appropriate voltage ratings and be located
as close to the converters as possible. Temperature variations for all relevant
parameters should be taken into consideration.
The most effective combination of external I/O capacitors will be a function of
your line voltage and source impedance, as well as your particular load and
layout conditions.
Input Fusing
Most applications and or safety agencies require the installation of fuses at
the inputs of power conversion components. LSN D3 Series DC/DC convert-
ers are not internally fused. Therefore, if input fusing is mandatory, either a
normal-blow or a fast-blow fuse with a value no greater than 17 Amps should
be installed within the ungrounded input path to the converter.
As a rule of thumb however, we recommend to use a fast-blow fuse with a
typical value of about twice the maximum input current, calculated at low line
with the converters minimum efficiency.
Safety Considerations
LSN D3 SIP's are non-isolated DC/DC converters. In general, all DC/DC's
must be installed, including considerations for I/O voltages and spacing/sepa-
ration requirements, in compliance with relevant safety-agency speci-
fications (usually UL/IEC/EN60950).
In particular, for a non-isolated converter's output voltage to meet SELV
(safety extra low voltage) requirements, its input must be SELV compliant.
If the output needs to be ELV (extra low voltage), the input must be ELV.
Input Overvoltage and Reverse-Polarity Protection
LSN D3 SIP Series DC/DC's do not incorporate either input overvoltage or
input reverse-polarity protection. Input voltages in excess of the specified
absolute maximum ratings and input polarity reversals of longer than "instan-
taneous" duration can cause permanent damage to these devices.
Start-Up Time
The V
IN
to V
OUT
Start-Up Time is the interval between the time at which a
ramping input voltage crosses the lower limit of the specified input voltage
range (3 Volts) and the fully loaded output voltage enters and remains within
its specified accuracy band. Actual measured times will vary with input source
impedance, external input capacitance, and the slew rate and final value of
the input voltage as it appears to the converter.
The On/Off to V
OUT
Start-Up Time assumes the converter is turned off via
the On/Off Control with the nominal input voltage already applied to the
converter. The specification defines the interval between the time at which the
converter is turned on and the fully loaded output voltage enters and remains
within its specified accuracy band. See Typical Performance Curves.
Remote Sense
LSN D3 SIP Series DC/DC converters offer an output sense function on pin 3.
The sense function enables point-of-use regulation for overcoming moderate
IR drops in conductors and/or cabling. Since these are non-isolated devices
whose inputs and outputs usually share the same ground plane, sense is
provided only for the +Output.
The remote sense line is part of the feedback control loop regulating the DC/
DC converter’s output. The sense line carries very little current and conse-
quently requires a minimal cross-sectional-area conductor. As such, it is not
a low-impedance point and must be treated with care in layout and cabling.
Sense lines should be run adjacent to signals (preferably ground), and in
cable and/or discrete-wiring applications, twisted-pair or similar techniques
should be used. To prevent high frequency voltage differences between V
OUT
and Sense, we recommend installation of a 1000pF capacitor close to the
converter.
The sense function is capable of compensating for voltage drops between
the +Output and +Sense pins that do not exceed 10% of V
OUT
.
[V
OUT
(+) – Common] – [Sense(+) – Common]
≤
10%V
OUT
Power derating (output current limiting) is based upon maximum output
current and voltage at the converter's output pins. Use of trim and sense
functions can cause the output voltage to increase, thereby increasing output
power beyond the LSN's specified rating. Therefore:
(V
OUT
at pins) x (I
OUT
)
≤
rated output power
The internal 10.5Ω resistor between +Sense and +Output (see Figure 1)
serves to protect the sense function by limiting the output current flowing
through the sense line if the main output is disconnected. It also prevents
output voltage runaway if the sense connection is disconnected.
Note: Connect the +Sense pin (pin 3) to +Output (pin 4) at the DC/DC
converter pins, if the sense function is not used for remote regulation.
On/Off Control and Power-up Sequencing
The On/Off Control pin may be used for remote on/off operation. LSN D3 SIP
Series DC/DC's are designed so they are enabled when the control pin is
left open (internal pull-down to Common) and disabled when the control pin
is pulled high (+2.8V to +V
IN
), as shown in Figure 2 and 2a.
Dynamic control of the on/off function is best accomplished with a mechani-
cal relay or open-collector/open-drain drive circuit. The drive circuit should
be able to sink appropriate current when activated and withstand appropriate
voltage when deactivated.
+INPUT
5kΩ
1.1kΩ
ON/OFF
CONTROL
0.75kΩ
COMMON
Figure 2. Driving the On/Off Control Pin with an Open-Collector Drive Circuit
The on/off control function, however, can be externally inverted so that the
converter will be disabled while the input voltage is ramping up and then
"released" once the input has stabilized.
www.murata-ps.com/support
MDC_LSN10A-D3.D02
Page 4 of 14
LSN-10A D3 Models
Single Output, Non-Isolated, 3.3V
IN
, 1-2.5V
OUT,
10A, DC/DC's in SIP Packages
+INPUT
+OUTPUT
0.9kΩ
1.1kΩ
ON/OFF
CONTROL
0.75kΩ
COMMON
5kΩ
+INPUT
TRIM
COMMON
Trim
Up
Trim
Down
LOAD
COMMON
Figure 3. Trim Connections Using a Trimpot
Figure 2a. Inverting On/Off Control Pin Signal and Power-Up Sequencing
For a controlled start-up of one or more LSN-D3's, or if several output volt-
ages need to be powered-up in a given sequence, the On/Off Control pin can
be pulled high (external pull-up resistor, converter disabled) and then driven
low with an external open collector device to enable the converter.
Output Overvoltage Protection
LSN D3 SIP Series DC/DC converters do not incorporate output overvolt-
age protection. In the extremely rare situation in which the device’s feedback
loop is broken, the output voltage may run to excessively high levels (V
OUT
=
V
IN
). If it is absolutely imperative that you protect your load against any and
all possible overvoltage situations, voltage limiting circuitry must be provided
external to the power converter.
Output Overcurrent Detection
Overloading the output of a power converter for an extended period of time
will invariably cause internal component temperatures to exceed their maxi-
mum ratings and eventually lead to component failure. High-current-carrying
components such as inductors, FET's and diodes are at the highest risk. LSN
D3 SIP Series DC/DC converters incorporate an output overcurrent detection
and shutdown function that serves to protect both the power converter and
its load.
If the output current exceeds it maximum rating by typically 60% (16 Amps)
or if the output voltage drops to less than 98% of it original value, the
LSN D3's internal overcurrent-detection circuitry immediately turns off the
converter, which then goes into a "hiccup" mode. While hiccupping, the
converter will continuously attempt to restart itself, go into overcurrent, and
then shut down. Under these conditions, the average output current will be
approximately 400mA, and the average input current will be approximately
70mA. Once the output short is removed, the converter will automatically
restart itself.
Output Voltage Trimming
Allowable trim ranges for each model in the LSN D3 SIP Series are ±10%.
Trimming is accomplished with either a trimpot or a single fixed resistor. The
trimpot should be connected between +Output and Common with its wiper
connected to the Trim pin as shown in Figure 3 below.
A trimpot can be used to determine the value of a single fixed resistor
which can then be connected, as shown in Figure 4, between the Trim pin
and +Output to trim down the output voltage, or between the Trim pin and
Common to trim up the output voltage. Fixed resistors should have absolute
TCR’s less than 100ppm/°C to ensure stability.
The equations below can be used as starting points for selecting specific trim-
resistor values. Recall, untrimmed devices are guaranteed to be ±1% accurate.
Adjustment beyond the specified ±10% adjustment range is not recommended.
+OUTPUT
+INPUT
TRIM
COMMON
COMMON
Trim Up
Trim
Down
LOAD
Note:
Install either a fixed trim-up resistor or a fixed trim-down resistor
depending upon desired output voltage.
Figure 4. Trim Connections Using Fixed Resistors
LSN-1/10-D3 Trim Equations
R
T
DOWN
(kΩ) =
1.62(V
O
– 0.8)
V
O NOM
– V
O
1.296
V
O
– V
O NOM
–1
R
T
UP
(kΩ) =
–1
LSN-1.2/10-D3, LSN-1.25/10-D3 Trim Equations
R
T
DOWN
(kΩ) =
2.49(V
O
– 0.8)
V
O NOM
– V
O
1.992
V
O
– V
O NOM
– 2.37
R
T
UP
(kΩ) =
– 2.37
LSN-1.5/10-D3, LSN-1.8/10-D3,
LSN-2/10-D3, LSN-2.5/10-D3 Trim Equations
R
T
DOWN
(kΩ) =
2.37(V
O
– 0.8)
V
O NOM
– V
O
1.896
V
O
– V
O NOM
– 4.99
R
T
UP
(kΩ) =
– 4.99
Note: Resistor values are in kΩ. Accuracy of adjustment is subject to
tolerances of resistors and factory-adjusted, initial output accuracy.
V
O
= desired output voltage. V
ONOM
= nominal output voltage.
Output Reverse Conduction
Many DC/DC converters using synchronous rectification suffer from Output
Reverse Conduction. If those devices have a voltage applied across their
output before a voltage is applied to their input (this typically occurs when
another power supply starts before them in a power-sequenced application),
www.murata-ps.com/support
MDC_LSN10A-D3.D02
Page 5 of 14
Embedded System
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