DATA SHEET
MOS FIELD EFFECT TRANSISTOR
µ
PA1740TP
PACKAGE DRAWING (Unit: mm)
8
5
1, 2, 3
: Source
4
: Gate
5, 6, 7, 8, 9 : Drain
SWITCHING
N-CHANNEL POWER MOS FET
DESCRIPTION
The
µ
PA1740TP is N-channel MOS FET device that features a
low on-state resistance and excellent swiching characteristics, and
designed for high voltage applications such as DC/DC converter.
FEATURES
•
High voltage: V
DSS
= 200 V
•
Gate voltage rating:
±30
V
•
Low on-state resistance
R
DS(on)
= 0.44
Ω
MAX. (V
GS
= 10 V, I
D
= 3.5 A)
•
Low input capacitance
C
iss
= 420 pF TYP. (V
DS
= 10 V, V
GS
= 0 V)
•
Built-in gate protection diode
•
Small and surface mount package (Power HSOP8)
•
Avalanche capability rated
1.49 ±0.21
1.44 TYP.
1
5.2
+0.17
–0.2
4
0.8 ±0.2
S
+0.10
–0.05
6.0 ±0.3
4.4 ±0.15
0.05 ±0.05
0.15
1.27 TYP.
0.40
1
+0.10
–0.05
0.10 S
0.12 M
2.0 ±0.2
2.9 MAX.
ORDERING INFORMATION
PART NUMBER
µ
PA1740TP
PACKAGE
Power HSOP8
8
9
4.1 MAX.
5
ABSOLUTE MAXIMUM RATINGS (T
A
= 25°C, Unless otherwise noted, All terminals are connected.)
Drain to Source Voltage (V
GS
= 0 V)
Gate to Source Voltage (V
DS
= 0 V)
Drain Current (DC) (T
C
= 25°C)
Drain Current (pulse)
Note1
V
DSS
V
GSS
I
D(DC)
I
D(pulse)
P
T1
P
T2
T
ch
T
stg
Note2
200
±30
±7.0
±21
22
1.0
150
–55 to + 150
7.0
4.9
7.0
2.2
V
V
A
A
W
W
°C
°C
A
mJ
A
mJ
Gate
Protection
Diode
Source
Gate
Body
Diode
Total Power Dissipation (T
C
= 25°C)
Total Power Dissipation (T
A
= 25°C)
Channel Temperature
Storage Temperature
Single Avalanche Current
Single Avalanche Energy
Note3
Note3
Note4
Note4
EQUIVALENT CIRCUIT
Drain
I
AS
E
AS
I
AR
E
AR
Repetitive Avalanche Current
Repetitive Avalanche Energy
Notes 1.
2.
3.
4.
PW
≤
10
µ
s, Duty Cycle
≤
1%
Mounted on a glass epoxy board (1 inch x 1 inch x 0.8 mm), PW = 10 sec
Starting T
ch
= 25°C, V
DD
= 100 V, R
G
= 25
Ω,
L = 100
µ
H, V
GS
= 20
→
0 V
T
ch
≤
125°C, V
DD
= 100 V, R
G
= 25
Ω
Remark
The diode connected between the gate and source of the transistor serves as a protector against ESD. When
this device actually used, an additional protection circuit is externally required if a voltage exceeding the rated
voltage may be applied to this device.
The information in this document is subject to change without notice. Before using this document, please
confirm that this is the latest version.
Not all devices/types available in every country. Please check with local NEC representative for
availability and additional information.
Document No.
G15937EJ1V0DS00 (1st edition)
Date Published May 2002 NS CP(K)
Printed in Japan
1.1 ±0.2
4
©
2001
µ
PA1740TP
ELECTRICAL CHARACTERISTICS (T
A
= 25°C, Unless otherwise noted, All terminals are connected.)
CHARACTERISTICS
Zero Gate Voltage Drain Current
Gate Leakage Current
Gate Cut-off Voltage
Forward Transfer Admittance
Drain to Source On-state Resistance
Input Capacitance
Output Capacitance
Reverse Transfer Capacitance
Turn-on Delay Time
Rise Time
Turn-off Delay Time
Fall Time
Total Gate Charge
Gate to Source Charge
Gate to Drain Charge
Body Diode Forward Voltage
Reverse Recovery Time
Reverse Recovery Charge
SYMBOL
I
DSS
I
GSS
V
GS(off)
| y
fs
|
R
DS(on)
C
iss
C
oss
C
rss
t
d(on)
t
r
t
d(off)
t
f
Q
G
Q
GS
Q
GD
V
F(S-D)
t
rr
Q
rr
V
DD
= 160 V
V
GS
= 10 V
I
D
= 7.0 A
I
F
= 7.0 A, V
GS
= 0 V
I
F
= 7.0 A, V
GS
= 0 V
di/dt = 50 A/
µ
s
TEST CONDITIONS
V
DS
= 200 V, V
GS
= 0 V
V
GS
= ±30 V, V
DS
= 0 V
V
DS
= 10 V, I
D
= 1.0 mA
V
DS
= 10 V, I
D
= 3.5 A
V
GS
= 10 V, I
D
= 3.5 A
V
DS
= 10 V
V
GS
= 0 V
f = 1 MHz
V
DD
= 100 V, I
D
= 3.5 A
V
GS
= 10 V
R
G
= 10
Ω
2.5
3
3.5
4.5
0.35
420
100
45
5
7.5
21
7
12
2
6.5
1.0
110
360
1.5
0.44
MIN.
TYP.
MAX.
10
±10
4.5
UNIT
µ
A
µ
A
V
S
Ω
pF
pF
pF
ns
ns
ns
ns
nC
nC
nC
V
ns
nC
TEST CIRCUIT 1 AVALANCHE CAPABILITY
D.U.T.
R
G
= 25
Ω
PG.
V
GS
= 20
→
0 V
50
Ω
TEST CIRCUIT 2 SWITCHING TIME
D.U.T.
L
V
DD
PG.
R
G
V
GS
R
L
V
DD
V
DS
90%
90%
10%
10%
V
GS
Wave Form
0
10%
V
GS
90%
BV
DSS
I
AS
I
D
V
DD
V
DS
V
GS
0
τ
τ
= 1
µ
s
Duty Cycle
≤
1%
V
DS
V
DS
Wave Form
0
t
d(on)
t
on
t
r
t
d(off)
t
off
t
f
Starting T
ch
TEST CIRCUIT 3 GATE CHARGE
D.U.T.
I
G
= 2 mA
PG.
50
Ω
R
L
V
DD
2
Data Sheet G15937EJ1V0DS
µ
PA1740TP
TYPICAL CHARACTERISTICS (T
A
= 25°C)
DERATING FACTOR OF FORWARD BIAS
SAFE OPERATING AREA
25
100
TOTAL POWER DISSIPATION vs.
CASE TEMPERATURE
dT - Percentage of Rated Power - %
P
T
- Total Power Dissipation - W
20
80
15
60
40
10
20
5
0
0
25
50
75
100
125
150
175
0
0
25
50
75
100
125
150
175
T
C
- Case Temperature -
°C
T
C
- Case Temperature -
°C
FORWARD BIAS SAFE OPERATING AREA
100
I
D(DC)
= 7.0 A
R
DS(on)
Limited
(V
GS
= 10 V)
I
D
- Drain Current - A
10
PW = 100
µs
DC
1
1 ms
10 ms
0.1
Power Dissipation Limited
T
C
= 25°C
Single Pulse
0.1
1
10
100
1000
0.01
V
DS
- Drain to Source Voltage - V
TRANSIENT THERMAL RESISTANCE vs. PULSE WIDTH
1000
r
th(ch-A)(t)
- Transient Thermal Resistance -
°C/W
R
th(j-A)
= 125°C/W
100
10
R
th(j-C)
= 5.68°C/W
1
0.1
100
µ
1m
10 m
100 m
1
PW - Pulse Width - s
10
100
1000
Data Sheet G15937EJ1V0DS
3
µ
PA1740TP
DRAIN CURRENT vs.
DRAIN TO SOURCE VOLTAGE
30
Pulsed
25
FORWARD TRANSFER CHARACTERISTICS
100
10
V
GS
= 10 V
V
DS
= 10 V
Pulsed
I
D
- Drain Current - A
20
15
10
5
0
0
5
I
D
- Drain Current - A
1
0.1
0.01
0.001
0.0001
T
ch
= 125°C
75°C
25°C
−25°C
10
15
20
25
30
0
5
10
15
V
DS
- Drain to Source Voltage - V
V
GS
- Gate to Source Voltage - V
GATE CUT-OFF VOLTAGE vs.
CHANNEL TEMPERATURE
V
DS
= 10 V
I
D
= 1 mA
FORWARD TRANSFER ADMITTANCE vs.
DRAIN CURRENT
| y
fs
| - Forward Transfer Admittance - S
100
V
DS
= 10 V
Pulsed
10
5.0
V
GS(off)
- Gate Cut-off Voltage - V
4.5
4.0
3.5
3.0
2.5
2.0
-50
-25
0
25
50
75
1
T
A
= 125°C
75°C
25°C
−25°C
0.1
100 125 150
0.01
0.01
0.1
1
10
100
T
ch
- Channel Temperature -
°C
I
D
- Drain Current - A
DRAIN TO SOURCE ON-STATE
RESISTANCE vs. DRAIN CURRENT
R
DS(on)
- Drain to Source On-state Resistance -
Ω
2
Pulsed
DRAIN TO SOURCE ON-STATE RESISTANCE vs.
GATE TO SOURCE VOLTAGE
R
DS(on)
- Drain to Source On-state Resistance -
Ω
1
0.9
0.8
0.7
0.6
0.5
0.4
0.3
0.2
0.1
0
0
2
4
6
8
10 12 14 16 18 20
V
GS
- Gate to Source Voltage - V
Pulsed
1.5
1
I
D
= 7.0 A
3.5 A
1.4 A
0.5
V
GS
= 10 V
0
0.01
0.1
1
10
100
I
D
- Drain Current - A
4
Data Sheet G15937EJ1V0DS
µ
PA1740TP
DRAIN TO SOURCE ON-STATE RESISTANCE vs.
CHANNEL TEMPERATURE
R
DS(on)
- Drain to Source On-state Resistance -
Ω
1.4
1000
V
GS
= 10 V
Pulsed
CAPACITANCE vs.
DRAIN TO SOURCE VOLTAGE
1
0.8
0.6
3.5 A
0.4
0.2
0
-50
-25
0
25
50
75
100
125
150
I
D
= 7.0 A
C
iss
, C
oss
, C
rss
- Capacitance - pF
1.2
C
iss
100
C
oss
10
C
rss
V
GS
= 0 V
f = 1 MHz
1
0.1
1
10
100
1000
T
ch
- Channel Temperature -
°C
V
DS
- Drain to Source Voltage - V
SWITCHING CHARACTERISTICS
100
DYNAMIC INPUT/OUTPUT CHARACTERISTICS
240
12
10
8
V
GS
6
4
2
0
0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15
V
DS
- Drain to Source Voltage - V
200
180
160
140
120
100
80
60
40
20
0
t
d(off)
10
t
d(on)
t
r
t
f
V
DS
1
0.1
1
10
100
I
D
- Drain Current - A
Q
G
- Gate Charge - nC
SOURCE TO DRAIN DIODE
FORWARD VOLTAGE
100
Pulsed
1000
REVERSE RECOVERY TIME vs.
DIODE FORWARD CURRENT
10
t
rr
- Reverse Recovery Diode - ns
I
F
- Diode Forward Current - A
100
1
V
GS
= 0 V
10
0.1
V
GS
= 0 V
di/dt = 100 A/
µs
0.01
0
0.25
0.5
0.75
1
1.25
1.5
1
0.1
1
10
100
V
SD
- Source to Drain Voltage - V
Data Sheet G15937EJ1V0DS
I
F
- Diode Forward Current - A
5
V
GS
- Gate to Source Voltage - V
t
d(on)
, t
r
, t
d(off)
, t
f
- Switching Time - ns
V
DD
= 100 V
V
GS
= 10 V
R
G
= 0
Ω
220
V
DD
= 160 V
100 V
40 V
I
D
= 7.0 A
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