DATA SHEET
Compound Field Effect Power Transistor
µ
PA1572B
N-CHANNEL POWER MOS FET ARRAY
SWITCHING
INDUSTRIAL USE
DESCRIPTION
The
µ
PA1572B is N-channel Power MOS FET Array
that built in 4 circuits designed for solenoid, motor and
lamp driver.
10
PACKAGE DIMENSIONS
in millimeters
26.8 MAX.
4.0
FEATURES
•
Full Mold Package with 4 Circuits
•
4 V driving is possible
•
Low On-state Resistance
R
DS(on)
= 0.6
Ω
MAX. (V
GS
= 10 V, I
D
= 1 A)
R
DS(on)
= 0.8
Ω
MAX. (V
GS
= 4 V, I
D
= 1 A)
•
Low Input Capacitance Ciss = 110 pF TYP.
2.54
1.4
0.6±0.1
ORDERING INFORMATION
Type Number
Package
10Pin SIP
3
1 2 3 4 5 6 7 8 910
µ
PA1572BH
CONNECTION DIAGRAM
5
7
9
2
1
4
6
8
10
ABSOLUTE MAXIMUM RATINGS (T
A
= 25
°C)
Drain to Source Voltage (V
GS
= 0)
Gate to Source Voltage (V
DS
= 0)
Drain Current (DC)
Drain Current (pulse)
Total Power Dissipation
Total Power Dissipation
Channel Temperature
Storage Tempreature
Single Avalanche Current
Single Avalanche Energy
*1 PW
≤
10
µ
s, Duty Cycle
≤
1 %
*3 4 Circuits T
A
= 25
°C
V
DSS
V
GSS (AC)
I
D (DS)
I
D (pulse)
*1
P
T1
*2
P
T2
*3
T
CH
T
stg
I
AS
*4
E
AS
*4
60
±20
V
V
±2.0
A/unit
±6.0
A/unit
20
3.0
W
W
ELECTRODE CONNECTION
2, 4, 6, 8 : Gate
3, 5, 7, 9 : Drain
1, 10
: Source
150
°C
−55
to +150°C
5.0
0.1
A
mJ
*2 4 Circuits T
C
= 25
°C
*4 Starting T
CH
= 25
°C,
V
DD
= 30 V, V
GS
= 20 V
→
0, R
G
= 25
Ω,
L = 100
µ
H
Build-in Gate Diodes are for protection from static electricity in handing.
In case high voltage over V
GSs
is applied, please append gate protection circuits.
The information in this document is subject to change without notice.
Document No. G11177EJ1V0DS00 (1st edition)
Date Published May 1996 P
Printed in Japan
©
10 MIN.
2.5
1.4
0.5±0.1
1996
µ
PA1572B
ELECTRICAL CHARACTERISTICS (T
A
= 25
°C)
CHARACTERISTIC
Drain Leakage Current
Gate Leakage Current
Gate Cutoff Voltage
Forward Transfer Admittance
Drain to Source ON-Resistance
Drain to Sourse ON-Resistance
Input Capacitance
Output Capacitance
Reverse Transfer Capacitance
Turn-on Delay Time
Rise Time
Turn-off Delay Time
Fall Time
Total Gate Charge
Gate to Source Charge
Gate to Drain Charge
Body Diode Forward Voltage
Reverse Recovery Time
Reverse Recovery Charge
SYMBOL
I
DSS
I
GSS
V
GS (off)
Y
fs
R
DS (on)1
R
DS (on)2
C
iss
C
oss
C
rss
t
d (on)
t
r
t
d (off)
t
f
Q
G
Q
GS
Q
GD
V
F (S-D)
t
rr
Q
rr
1.0
0.5
0.3
0.4
110
70
25
30
200
100
160
5.4
0.7
2.0
1.0
130
110
0.6
0.8
MIN.
TYP.
MAX.
10
±10
2.0
UNIT
TEST CONDITION
V
DS
= 60 V, V
GS
= 0
V
GS
=
±20
V, V
DS
= 0
V
DS
= 10 V, I
D
= 1.0 mA
V
DS
= 10 V, I
D
= 1.0 A
V
GS
= 10 V, I
D
= 1.0 A
V
GS
= 4.0 V, I
D
= 1.0 A
V
DS
= 10 V, V
GS
= 0, f = 1.0 MHz
µ
A
µ
A
V
S
Ω
Ω
pF
pF
pF
ns
ns
ns
ns
nC
nC
nC
V
ns
nC
I
D
= 1.0 A, V
GS (on)
= 10 V, V
DD
= 30 V, R
L
= 30
Ω
V
GS
= 10 V, I
D
= 2.0 A, V
DD
= 48 V
I
F
= 2.0 A, V
GS
= 0
I
F
= 2.0 A, V
GS
= 0, di/dt = 50 A/
µ
s
2
µ
PA1572B
Test Circuit 1 Avalanche Capability
D.U.T.
R
G
= 25
Ω
PG.
V
GS
= 20 V
→
0
50
Ω
L
V
DD
BV
DSS
I
AS
I
D
V
DD
V
DS
Starting T
CH
Test Circuit 2 Switching Time
D.U.T.
R
L
V
GS
PG.
R
G
R
G
= 10
Ω
Wave From
V
GS
0
I
D
I
D
Wave From
0
10 %
t
d (on)
t
r
t
on
10 %
90 %
V
GS (on)
90 %
V
DD
90 %
I
D
t
d (off)
t
off
10 %
t
r
V
GS
0
t
t = 1
µ
s
Duty Cycle
≤
1 %
Test Circuit 3 Gate Charge
D.U.T.
I
G
= 2 mA
PG.
50
Ω
R
L
V
DD
3
µ
PA1572B
CHARACTERISTICS (T
A
= 25
°C)
TOTAL POWER DISSIPATION vs.
AMBIENT TEMPERATURE
3.5
P
T
- Total Power Dissipation - W
3.0
2.5
2.0
1.5
Under Same
dissipation in
each circuit
4 Circuits operation
3 Circuits operation
2 Circuits operation
1 Circuit operation
TOTAL POWER DISSIPATION vs.
CASE TEMPERATURE
T
c
is grease
Temperature
on back surface
Under Same
dissipation in
each circuit
4 Circuits operation
20
3 Circuits operation
2 Circuits operation
10
1 Circuit operation
P
T
- Total Power Dissipation - W
30
1.0
0.5
0
,,
10
1.0
R
(
DS
)
L
on
NEC
µ
PA1572BH Lead
Print
Circuit
Boad
50
100
150
T
A
- Ambient Temperature -
°C
0
50
100
150
T
C
- Case Temperature -
°C
DERATING FACTOR OF FORWARD BIAS
SAFE OPERATING AREA
dT - Percentage of Rated Power - %
100
FORWARD BIAS SAFE OPERATING AREA
)
0V
1
I
D(Pulse)
I
D(DC)
I
D
- Drain Current - A
d(
ite
im
V
G
S
=
0.
1
0.
ms
5m
10
m
s
1m
s
s
50
m
s
DC
100
80
60
40
20
0.1
0.01
0.1
T
C
= 25
°C
Single Pulse
1.0
10
0
20
40
60
80
100 120 140 160
V
DS -
Drain to Source Voltage - V
FORWARD TRANSFER CHARACTERISTICS
100
Pulsed
V
DS
=10V
I
D
- Drain Current - A
I
D
- Drain Current - A
10
8
T
C
- Case Temperature -
°C
DRAIN CURRENT vs.
DRAIN TO SOURCE VOLTAGE
Pulsed
6
V
GS
=20V
10V
4
V
GS
=4V
2
1.0
T
A
=125
°C
75
°C
25
°C
-25
°C
0.1
0
2
4
6
0
1
2
3
V
GS-
Gate to Source Voltage - V
V
DS
- Drain to Source Voltage - V
4
µ
PA1572B
TRANSIENT THERMAL RESISTANCE vs. PULSE WIDTH
10 000
r
th(t)
- Transient Thermal Resistance -
°C/W
1 000
100
R
th (CH-A)
4Circuits
3Circuits
2Circuits
1Circuit
10
1.0
For Each Circuit,
Single Pulse
0.1
100
µ
1m
10 m
100 m
1
10
100
1 000
PW - Pulse Width - s
10
V
DS
=10V
Pulsed
T
A
=-25°C
25°C
75°C
125°C
1.0
R
DS(on)
- Drain to Source On-State Resistance -
Ω
FORWARD TRANSFER ADMITTANCE vs.
DRAIN CURRENT
y
fs
- Forward Transfer Admittance - S
DRAIN TO SOURCE ON-STATE RESISTANCE vs.
GATE TO SOURCE VOLTAGE
1.5
Pulsed
1.0
I
D
= 2 A
1A
0.4 A
0.5
0.1
0.01
0.1
1.0
10
0
10
V
GS
- Gate to Source Voltage - V
20
I
D
- Drain Current - A
R
DS(on)
- Drain to Source On-State Resistance -
Ω
2.0
Pulsed
V
GS(off)
- Gate to Source Cutoff Voltage - V
DRAIN TO SOURCE ON-STATE
RESISTANCE vs. DRAIN CURRENT
GATE TO SOURCE CUTOFF VOLTAGE vs.
CHANNEL TEMPERATURE
2
V
DS
= 10 V
I
D
= 1 mA
1.0
1
V
GS
=4V
V
GS
=10V
0
0.1
1.0
10
0
−
50
0
50
100
150
I
D
- Drain Current - A
T
CH
- Channel Temperature -
°C
5
京公网安备 11010802033920号
EEWORLD
