UNISONIC TECHNOLOGIES CO., LTD
UC3853
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LINEAR INTEGRATED CIRCUIT
CURRENT MODE PWM
CONTROLLER FOR FORWARD
AND FLYBACK APPLICATIONS
DESCRIPTION
SOP-8
The UTC
UC3853
is a high performance current mode PWM
controller ideally suited for low standby power. Low V
DD
startup
current make the power reliable on startup design and a large
value resistor could be used to minimize the standby power. At no
load condition, the IC operates in power-saving mode for lower
standby power, decreasing frequency for Higher conversion
efficiency at light load condition. It contains protection with
automatic recovery including OLP, OCP, VCC OVP, BNO and
OTP. To protect the power MOSFET, Gate-drive output is fixed up
to 15V max.
Excellent EMI performance is achieved with UTC proprietary
frequency hopping technique (ZL201020615247.1) together with
soft driver control. The controller offers everything needed to build
cost−effective and reliable ac−dc switching supplies dedicated to
ATX power supplies. Finally a SOP-8 package saves PCB space
and represents a solution of choice in cost sensitive project.
FEATURES
* Peak Current Mode Control
* Adjustable Switching Frequency
* Adjustable Soft−start Timer
* Adjustable Internal Ramp Compensation
* Jittering Frequency ±6% of the Switching Frequency
* Power-saving mode for high standby efficiency
* Auto−recovery Primary OCP with 10ms Fixed Delay
* Auto−recovery Brown−Out Detection
* Delayed Operation Upon Start−up via an Internal Fixed Timer
* UC384X−like UVLO Thresholds
* V
CC
from 9V to 28V with Auto−recovery UVLO
* Internal 350ns Leading Edge Blanking
* Gate output voltage clamped at 15V
* UC3853A: Maximum 47% Duty Cycle
* UC3853B: Maximum 75% Duty Cycle
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Copyright © 2019 Unisonic Technologies Co., Ltd
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QW-R103-167.a
UC3853
Lead Free
UC3853XL-S08-R
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LINEAR INTEGRATED CIRCUIT
ORDERING INFORMATION
Ordering Number
Halogen Free
UC3853XG-S08-R
Package
SOP-8
Packing
Tape Reel
UC3853XG-S08-R
(1)Packing Type
(2)Package Type
(3)Green Package
(4)Duty Cycle
(1) R: Tape Reel
(2) S08: SOP-8
(3) G: Halogen Free and Lead Free, L: Lead Free
(4) A: 47%, B: 75%
MARKING
8
7
6
5
Duty Cycle
A: 47%
B: 75%
UTC
UC3853
1
2
3
4
Date Code
L: Lead Free
G: Halogen Free
Lot Code
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QW-R103-167.a
UC3853
PIN CONFIGURATION
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LINEAR INTEGRATED CIRCUIT
FB
BO
CS
RT
1
2
3
4
8
7
6
5
SS
V
CC
DRV
GND
PIN DESCRIPTION
PIN NO.
1
2
3
4
5
6
7
8
PIN NAME
FB
BO
CS
RT
GND
DRV
V
CC
SS
DESCRIPTION
Feedback input pin. The PWM duty cycle is determined by voltage level into this pin
and SENSE pin input
Line input voltage brown out protection
Current sense input pin. Connected to MOSFET current sensing resistor node
A resistor connected to ground defined the switching frequency
Ground
This pin connects to the MOSFET gate
Power supply
A capacitor connected to ground defined the soft start time
BLOCK DIAGRAM
UC3853A: Maximum 47% Duty Cycle
UC3853B: Maximum 75% Duty Cycle
3.5V
0V
Buffered
Ramp
CLK
OSC
RT
Over Load&Open Loop Protection (OLP)
Fault
Timer
(15mS) Q
Reset
OCP
por
V
DD
R
Q
15V
UVLO
UVLO Reset
S
por
R
Q
Q
CLK
32V
S
Q
Ton
Driver
Drv
V
CC
V
CC
Management
FB
V
FB_IN
GND
2R
R
OCP
CS
Rramp
LEB
Buffered
Ramp
Ton
1V
V
SS
OCP
SS_en
UVLO
Delay
120ms
SS_en
V
DD
I
SS
BO
V
BO
I
BO
SS_en
por
UVLO Reset
V
SS
SS
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QW-R103-167.a
UC3853
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LINEAR INTEGRATED CIRCUIT
ABSOLUTE MAXIMUM RATING
PARAMETER
SYMBOL
RATINGS
UNIT
Power Supply Voltage, V
CC
Pin, OVP Voltage
V
CC
29
V
Power Supply Voltage, V
CC
Pin, Continuous Voltage
V
CC
28
V
Maximum Current Injected Into Pin 7
I
VCC
20
mA
Maximum Voltage On Low Power Pins (Except pin 6, 7)
-0.3 ~ 10
V
Maximum Junction Temperature
T
J
+150
°C
Storage Temperature Range
T
OPR
-60 ~ +150
°C
Note: Absolute maximum ratings are those values beyond which the device could be permanently damaged.
Absolute maximum ratings are stress ratings only and functional device operation is not implied.
THERMAL DATA
SYMBOL
θ
JA
RATINGS
169
UNIT
°C/W
PARAMETER
Typical Thermal Resistance
ELECTRICAL CHARACTERISTICS
values T
J
=25°C, for min/max values T
J
=–25°C~+125°C, unless
TEST CONDITIONS
MIN
TYP
MAX
UNIT
(V
CC
=15V, R
T
=43kΩ, C
DRV
=1nF. For typical
otherwise noted)
PARAMETER
SYMBOL
SUPPLY SECTION AND V
CC
MANAGEMENT
Startup Threshold At Which Driving
V
CC_ON
Pulses Are Authorized
Minimum Operating Voltage At
V
CC_OFF
Which Driving Pulses Are Stopped
Start−up Current, Controller
I
STR
Disabled
Internal IC Consumption, Controller
I
CC
Switching
OVP Threshold
V
CC_OVP
CURRENT COMPARATOR
Current Sense Voltage Threshold
V
ILIM
Leading Edge Blanking Duration
t
LEB
Internal Ramp Compensation
V
Ramp
Voltage Level
Internal Ramp Compensation
R
Ramp
Resistance To CS Pin
INTERNAL OSCILLATOR
Oscillator Frequency
f
OSC
Frequency Modulation In
f
Jitter
Percentage Of f
OSC
DC_
Max.
Maximum Duty Cycle
DC_
Max.
FEEDBACK SECTION
Internal Voltage Division From FB
FB
DIV
To CS Setpoint
Internal Pull−Up Resistor
R
Pull−up
FB Pin Maximum Current
I
FB
Open Loop Feedback Voltage
V
FBOL
Burst-Mode Enter FB Voltage
V
FB-IN
Burst-Mode Quit FB Voltage
V
FB-OUT
V
CC
increasing
V
CC
decreasing
V
CC
<V
CC(on)
&V
CC
increasing from zero
FB=3.5V,
R
T
=43kΩ
9.4
8.3
10
9
5
10.6
9.6
20
2
30.5
1.04
V
V
μA
mA
V
V
ns
V
kΩ
0.5
26.5
0.89
1.1
28.5
0.96
350
3.5
26.5
FB=3.5V，R
T
=43KΩ
(Note 1)
@ 25°C (Note 2)
@ 25°C (Note 2)
R
T
=43kΩ & DRV pin=47kΩ
(Note 1)
UC3853A
UC3853B
42
70
3.15
3.85
90
100
±6
46
78
110
kHz
%
50
85
%
%
(Note 1)
(Note 1)
FB pin=GND
FB pin=OPEN
3
3.5
1
5.4
0.63
0.66
kΩ
mA
V
V
V
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UC3853
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LINEAR INTEGRATED CIRCUIT
ELECTRICAL CHARACTERISTICS (Cont.)
values T
J
=25°C, for min/max values T
J
=–25°C~+125°C, unless
TEST CONDITIONS
I
SOURCE
=20mA
I
SINK
=20mA
C
L
=1.0nF
C
L
=1.0nF
MIN
TYP
MAX
0.8
10
60
30
120
60
15
10
4.0
120
260
100
UNIT
V
V
ns
ns
V
μA
V
ms
(V
CC
=15V, R
T
=43kΩ, C
DRV
=1nF. For typical
otherwise noted)
PARAMETER
SYMBOL
DRIVE OUTPUT
Output Voltage Low State
V
OL
Output Voltage High State
V
OH
Output Voltage Rise Time
t
R
Output Voltage Fall Time
t
F
Output Clamp Voltage
V
Clamp
SOFT START
Soft−Start Charge Current
I
SS
Soft Start Completion Voltage
V
SS
Threshold
Internal Delay Before Starting The
SS
Delay
Soft Start When V
CC(on)
Is Reached
PROTECTION
Current Sense Fault Voltage Level
F
CS
Triggering The Timer
Timer Delay Before Latching A Fault
T
Fault
(Overload Or Short Circuit)
Brown−Out Voltage
V
BO
PROTECTION
Internal Current Source Generating
I
BO
The Brown−Out Hysteresis
Notes: 1. Guaranteed by design.
2. V
ramp
, R
ramp
Guaranteed by design.
SS pin=GND
8
3.5
70
12
4.5
180
0.89
When CS pin>F
CS
10
0.89
0.96
20
0.96
1.04
40
1.04
V
ms
V
μA
9.2
10
10.8
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QW-R103-167.a
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