IDT54/74FCT244/A/C
FAST CMOS OCTAL BUFFER/LINE DRIVER
MILITARY AND COMMERCIAL TEMPERATURE RANGES
FAST CMOS OCTAL
BUFFER/LINE DRIVER
IDT54/74FCT244/A/C
FEATURES:
•
•
•
•
•
•
•
•
IDT54FCT244 equivalent to FAST™ speed and drive
IDT54/74FCT244A 25% faster than FAST
IDT74FCT244C up to 55% faster than FAST
I
OL
= 64mA (commercial) and 48mA (military)
CMOS power levels (1mW typ. static)
MIlitary product compliant to MIL-STD-883, Class B
Meets or exceeds JEDEC Standard 18 specifications
Available in the following packages:
– Commercial: SOIC
– Military: CERDIP, LCC
DESCRIPTION:
The IDT octal buffer/line drivers are built using an advanced dual metal
CMOS technology. The FCT244 is designed to be employed as a memory and
address driver, clock driver, and bus-oriented transmitter/receiver which
provides improved board density.
FUNCTIONAL BLOCK DIAGRAM
1
OE
A
19
OE
B
OA
0
DB
0
OA
1
DB
1
OA
2
DB
2
OA
3
DB
3
JUNE 2002
DSC-5420/3
DA
0
OB
0
DA
1
OB
1
DA
2
OB
2
DA
3
OB
3
2
18
3
17
4
16
5
15
6
14
7
13
8
12
9
11
The IDT logo is a registered trademark of Integrated Device Technology, Inc.
MILITARY AND COMMERCIAL TEMPERATURE RANGES
1
© 2002 Integrated Device Technology, Inc.
IDT54/74FCT244/A/C
FAST CMOS OCTAL BUFFER/LINE DRIVER
MILITARY AND COMMERCIAL TEMPERATURE RANGES
PIN CONFIGURATION
V
CC
20
OE
A
DA
0
OB
0
DA
1
OB
1
DA
2
OB
2
DA
3
OB
3
GND
INDEX
2
3
4
5
6
7
8
9
10
19
18
17
16
15
14
13
12
11
OE
B
OA
0
DB
0
OA
1
DB
1
OA
2
DB
2
OA
3
OB
3
GND
OA
3
DB
3
3
2
1
19
18
17
16
15
14
9
10
11
12
13
DA
0
1
OB
0
20
V
CC
OE
A
OE
B
DA
1
OB
1
DA
2
OB
2
DA
3
4
5
6
7
8
OA
0
DB
0
OA
1
DB
1
OA
2
DB
3
CERDIP/ SOIC
TOP VIEW
LCC
TOP VIEW
ABSOLUTE MAXIMUM RATINGS
(1)
Symbol
V
TERM
(2)
V
TERM
(3)
T
A
T
BIAS
T
STG
P
T
I
OUT
Rating
Terminal Voltage
with Respect to GND
Terminal Voltage
with Respect to GND
Operating Temperature
Temperature under BIAS
Storage Temperature
Power Dissipation
DC Output Current
0 to +70
–55 to +125
–55 to +125
0.5
120
–55 to +125
–65 to +135
–65 to +150
0.5
120
°C
°C
°C
W
mA
–0.5 to V
CC
–0.5 to V
CC
V
Commercial
–0.5 to +7
Military
–0.5 to +7
Unit
V
PIN DESCRIPTION
Pin Names
OE
A
,
OE
B
Dxx
Oxx
Description
3–State Output Enable Inputs (Active LOW)
Inputs
Outputs
FUNCTION TABLE
(1)
Inputs
OE
A
L
L
H
OE
B
L
L
H
D
L
H
X
Outputs
L
NOTES:
1. Stresses greater than those listed under ABSOLUTE MAXIMUM RATINGS may cause
permanent damage to the device. This is a stress rating only and functional operation
of the device at these or any other conditions above those indicated in the operational
sections of this specification is not implied. Exposure to absolute maximum rating
conditions for extended periods may affect reliability. No terminal voltage may exceed
Vcc by +0.5V unless otherwise noted.
2. Input and Vcc terminals only.
3. Output and I/O terminals only.
DB
2
H
Z
CAPACITANCE
(T
A
= +25°C, F = 1.0MHz)
Symbol
C
IN
C
OUT
Parameter
(1)
Input Capacitance
Output Capacitance
Conditions
V
IN
= 0V
V
OUT
= 0V
Typ.
6
8
Max.
10
12
Unit
pF
pF
NOTE:
1. H = HIGH Voltage Level
X = Don’t Care
L = LOW Voltage Level
Z = High Impedance
NOTE:
1. This parameter is measured at characterization but not tested.
2
IDT54/74FCT244/A/C
FAST CMOS OCTAL BUFFER/LINE DRIVER
MILITARY AND COMMERCIAL TEMPERATURE RANGES
DC ELECTRICAL CHARACTERISTICS OVER OPERATING RANGE
Following Conditions Apply Unless Otherwise Specified: V
LC
= 0.2V; V
HC
= V
CC
- 0.2V
Commercial: T
A
= 0°C to +70°C, V
CC
= 5.0V ±5%, Military: T
A
= -55°C to +125°C, V
CC
= 5.0V ±10%
Symbol
V
IH
V
IL
I
IH
I
IL
I
OZH
I
OZL
V
IK
I
OS
V
OH
Off State (High Impedance)
Output Current
Clamp Diode Voltage
Short Circuit Current
Output HIGH Voltage
V
CC
= Max.
Parameter
Input HIGH Level
Input LOW Level
Input HIGH Current
V
CC
= Max.
Input LOW Current
Test Conditions
(1)
Guaranteed Logic HIGH Level
Guaranteed Logic LOW Level
V
I
= V
CC
V
I
= 2.7V
V
I
= 0.5V
V
I
= GND
V
O
= V
CC
V
O
= 2.7V
V
O
= 0.5V
V
O
= GND
Min.
2
—
—
—
—
—
—
—
—
—
—
–60
V
HC
V
HC
2.4
2.4
—
—
—
—
Typ.
(2)
—
—
—
—
—
—
—
—
—
—
–0.7
–120
V
CC
V
CC
4.3
4.3
GND
GND
0.3
0.3
Max.
—
0.8
5
5
(4)
–5
(4)
–5
10
10
(4)
–10
(4)
–10
–1.2
—
—
—
—
—
V
LC
V
LC
(4)
0.55
0.55
µA
µA
Unit
V
V
V
CC
= Min., I
IN
= –18mA
V
CC
= Max., V
O
= GND
(3)
V
CC
= 3V, V
IN
= V
LC
or V
HC
, I
OH
= –32μA
V
CC
= Min
I
OH
= –300μA
V
IN
= V
IH
or V
IL
I
OH
= –12mA MIL
I
OH
= –15mA COM'L
V
CC
= 3V, V
IN
= V
LC
or V
HC
, I
OL
= 300μA
V
CC
= Min
I
OL
= 300μA
V
IN
= V
IH
or V
IL
I
OL
= 48mA MIL
I
OL
= 64mA COM'L
V
mA
V
V
OL
Output LOW Voltage
V
NOTES:
1. For conditions shown as Min. or Max., use appropriate value specified under Electrical Characteristics for the applicable device type.
2. Typical values are at V
CC
= 5.0V, +25°C ambient and maximum loading.
3. Not more than one output should be tested at one time. Duration of the test should not exceed one second.
4. This parameter is guaranteed but not ttested.
3
IDT54/74FCT244/A/C
FAST CMOS OCTAL BUFFER/LINE DRIVER
MILITARY AND COMMERCIAL TEMPERATURE RANGES
POWER SUPPLY CHARACTERISTICS
V
LC
= 0.2V; V
HC
= V
CC
- 0.2V
Symbol
I
CC
ΔI
CC
I
CCD
Parameter
Quiescent Power Supply Current
Quiescent Power Supply Current
TTL Inputs HIGH
Dynamic Power Supply
Current
(4)
Test Conditions
(1)
V
CC
= Max.
V
IN
≥
V
HC
; V
IN
≤
V
LC
V
CC
= Max.
V
IN
= 3.4V
(3)
V
CC
= Max.
Outputs Open
OE
A
=
OE
B
= GND
One Input Toggling
50% Duty Cycle
I
C
Total Power Supply Current
(6)
V
CC
= Max.
Outputs Open
f
I
= 10MHz
50% Duty Cycle
OE
A
=
OE
B
= GND
One Bit Toggling
V
CC
= Max.
Outputs Open
f
I
= 2.5MHz
50% Duty Cycle
OE
A
=
OE
B
= GND
Eight Bits Toggling
NOTES:
1. For conditions shown as Min. or Max., use appropriate value specified under Electrical Characteristics for the applicable device type.
2. Typical values are at V
CC
= 5.0V, +25°C ambient.
3. Per TTL driven input (V
IN
= 3.4V). All other inputs at V
CC
or GND.
4. This parameter is not directly testable, but is derived for use in Total Power Supply Calculations.
5. Values for these conditions are examples of
ΔI
CC
formula. These limits are guaranteed but not tested.
6. I
C
= I
QUIESCENT
+ I
INPUTS
+ I
DYNAMIC
I
C
= I
CC
+
ΔI
CC
D
H
N
T
+ I
CCD
(f
CP
/2 + fiNi)
I
CC
= Quiescent Current
ΔI
CC
= Power Supply Current for a TTL High Input (V
IN
= 3.4V)
D
H
= Duty Cycle for TTL Inputs High
N
T
= Number of TTL Inputs at D
H
I
CCD
= Dynamic Current caused by an Input Transition Pair (HLH or LHL)
f
CP
= Clock Frequency for register devices (zero for non-register devices)
fi = Input Frequency
Ni = Number of Inputs at fi
All currents are in milliamps and all frequencies are in megahertz.
Min.
—
—
Typ.
(2)
0.2
0.5
0.15
Max.
1.5
2
0.25
Unit
mA
mA
mA/
MHz
V
IN
≥
V
HC
V
IN
≤
V
LC
—
V
IN
≥
V
HC
V
IN
≤
V
LC
(FCT)
V
IN
= 3.4V
V
IN
= GND
V
IN
≥
V
HC
V
IN
≤
V
LC
(FCT)
V
IN
= 3.4V
V
IN
= GND
—
1.7
4
mA
—
2
5
—
3.2
6.5
(5)
—
5.2
14.5
(5)
SWITCHING CHARACTERISTICS OVER OPERATING RANGE
(1,2)
Symbol
t
PLH
t
PHL
t
PZH
t
PZL
t
PHZ
t
PLZ
Parameter
Propagation Delay
Dx to Ox
Output Enable Time
Output Disable Time
Condition
C
L
= 50pF
R
L
= 500Ω
54FCT244
Mil.
Min.
Max.
1.5
7
1.5
1.5
8.5
7.5
54/74FCT244A
Com'l.
Mil.
Min.
Max.
Min.
Max.
1.5
4.8
1.5
5.1
1.5
1.5
6.2
5.6
1.5
1.5
6.5
5.9
74FCT244C
Com'l.
Min.
Max.
1.5
4.1
1.5
1.5
5.8
5.2
Unit
ns
ns
ns
NOTES:
1. See test circuit and waveforms.
2. Minimum limits are guaranteed but not tested on Propagation Delays.
4
IDT54/74FCT244/A/C
FAST CMOS OCTAL BUFFER/LINE DRIVER
MILITARY AND COMMERCIAL TEMPERATURE RANGES
TEST CIRCUITS AND WAVEFORMS
V
CC
500Ω
V
IN
Pulse
Generator
R
T
D.U.T
.
V
OUT
7.0V
SWITCH POSITION
Test
Open Drain
Disable Low
Enable Low
Switch
Closed
Open
50pF
C
L
500Ω
All Other Tests
DEFINITIONS:
C
L
= Load capacitance: includes jig and probe capacitance.
R
T
= Termination resistance: should be equal to Z
OUT
of the Pulse Generator.
Octal Link
Test Circuits for All Outputs
DATA
INPUT
TIMING
INPUT
ASYNCHRONOUS CONTROL
PRESET
CLEAR
ETC.
SYNCHRONOUS CONTROL
PRESET
CLEAR
CLOCK ENABLE
ETC.
t
SU
t
H
t
REM
3V
1.5V
0V
3V
1.5V
0V
3V
1.5V
0V
3V
1.5V
0V
LOW-HIGH-LOW
PULSE
t
W
HIGH-LOW-HIGH
PULSE
1.5V
1.5V
t
SU
t
H
Pulse Width
Octal Link
Octal Link
Set-Up, Hold, and Release Times
ENABLE
SAME PHASE
INPUT TRANSITION
t
PLH
OUTPUT
t
PLH
OPPOSITE PHASE
INPUT TRANSITION
t
PHL
t
PHL
3V
1.5V
0V
V
OH
1.5V
V
OL
3V
1.5V
0V
CONTROL
INPUT
t
PZL
OUTPUT
NORMALLY
LOW
OUTPUT
NORMALLY
HIGH
SWITCH
CLOSED
t
PZH
SWITCH
OPEN
3.5V
1.5V
t
PHZ
DISABLE
3V
1.5V
t
PLZ
0V
3.5V
0.3V
0.3V
1.5V
0V
V
OL
V
OH
0V
Octal Link
Propagation Delay
Octal Link
Enable and Disable Times
NOTES:
1. Diagram shown for input Control Enable-LOW and input Control Disable-HIGH.
2. Pulse Generator for All Pulses: Rate
≤
1.0MHz; Z
O
≤
50Ω; t
F
≤
2.5ns; t
R
≤
2.5ns.
5
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