PSD8XXF2 PSD8XXF3
PSD8XXF4 PSD8XXF5
Flash In-System-Programmable Microcontroller Peripherals
Table of Contents
1.0
2.0
3.0
4.0
5.0
Introduction ...........................................................................................................................................................1
Key Features ........................................................................................................................................................2
PSD8XXF Block Diagram...............................................................................................................................4
General Information ..............................................................................................................................................5
PSD8XXF Family ..................................................................................................................................................5
PSD8XXF Architectural Overview ........................................................................................................................6
5.1 Memory...................................................................................................................................................6
5.2 Page Register .........................................................................................................................................6
5.3 PLDs .......................................................................................................................................................6
5.4 I/O Ports..................................................................................................................................................7
5.5 Microcontroller Bus Interface ..................................................................................................................7
5.6 JTAG Port ...............................................................................................................................................7
5.7 In-System Programming .........................................................................................................................8
5.8 Power Management................................................................................................................................8
Development System............................................................................................................................................9
PSD8XXF Pin Descriptions ................................................................................................................................10
PSD8XXF Register Description and Address Offset ..........................................................................................14
PSD8XXF Functional Blocks ..............................................................................................................................15
9.1 Memory Blocks .....................................................................................................................................15
9.1.1 Main Flash and Flash Boot Memory Description........................................................................15
9.1.2 SRAM .........................................................................................................................................27
9.1.3 Memory Select Signals...............................................................................................................27
9.1.4 Page Register.............................................................................................................................30
9.2 PLDs .....................................................................................................................................................31
9.2.1 Decode PLD (DPLD) ..................................................................................................................33
9.2.2 Complex PLD (CPLD) ................................................................................................................33
9.3 Microcontroller Bus Interface ................................................................................................................42
9.3.1 PSD8XXF Interface to a Multiplexed 8-Bit Bus ..........................................................................42
9.3.2 PSD8XXF Interface to a Non-Multiplexed 8-bit Bus...................................................................42
9.3.3 Data Byte Enable Reference......................................................................................................45
9.3.4 Microcontroller Interface Examples ............................................................................................45
9.4 I/O Ports................................................................................................................................................50
9.4.1 General Port Architecture...........................................................................................................50
9.4.2 Port Operating Modes ................................................................................................................52
9.4.3 Port Configuration Registers (PCRs) .........................................................................................55
9.4.4 Port Data Registers ....................................................................................................................58
9.4.5 Ports A and B – Functionality and Structure ............................................................................59
9.4.6 Port C – Functionality and Structure ........................................................................................61
9.4.7 Port D – Functionality and Structure ........................................................................................61
9.5 Power Management..............................................................................................................................65
9.5.1 Automatic Power Down (APD) Unit and Power Down Mode .....................................................65
9.5.2 Other Power Saving Options......................................................................................................69
9.5.3 Reset and Power On Requirement ............................................................................................70
6.0
7.0
8.0
9.0
i
PSD8XXF2 PSD8XXF3
PSD8XXF4 PSD8XXF5
Flash In-System-Programmable Microcontroller Peripherals
Table of Contents
(cont.)
9.6 Programming In-Circuit Using the JTAG Interface ...............................................................................71
9.6.1 Standard JTAG Signals..............................................................................................................72
9.6.2 JTAG Extensions........................................................................................................................73
9.6.3 Security and Flash Memories Protection....................................................................................73
Absolute Maximum Ratings.........................................................................................................................................74
AD/DC Parameters......................................................................................................................................................75
Example of PSD8XXF Typical Power Calculation at V
CC
= 5.0 V ......................................................................76
Example of PSD8XXF Typical Power Calculation at V
CC
= 5.0 V in Turbo Off Mode ........................................77
PSD8XXF DC Characteristics (5 V ± 10% Versions)..........................................................................................78
PSD8XXF AD/DC Parameters – CPLD Timing Parameters (5 V ± 10% versions) ..........................................79
PSD8XXF DC Characteristics (3.0 V to 3.6 V Versions) ....................................................................................87
PSD8XXF AD/DC Parameters – CPLD Timing Parameters (3.0 V to 3.6 V Versions) ....................................88
Timing Diagrams .........................................................................................................................................................96
Programming .............................................................................................................................................................103
Pin Assignments........................................................................................................................................................104
Package Information .................................................................................................................................................107
Selector Guide...........................................................................................................................................................112
Part Number Construction .........................................................................................................................................113
Ordering Information..................................................................................................................................................113
Product Revisions......................................................................................................................................................116
For additional information,
Call 800-832-6974
Fax: 510-657-8495
Web Site: http://www.psdst.com
E-mail: ask.psd@st.com
ii
Programmable Peripheral
PSD813F2-A, PSD813F3-A
PSD813F4-A, PSD813F5-A
PSD833F2, PSD834F2
PSD853F2, PSD854F2
Preliminary Information
1.0
Introduction
Flash In-System-Programmable
Microcontroller Peripherals
The PSD8XXF family of Programmable Microcontroller (MCU) Peripherals brings
In-System-Programmability (ISP) to Flash memory and programmable logic. The result is a
simple and flexible solution for embedded designs. PSD8XXF devices combine many of
the peripheral functions found in MCU based applications:
•
Up to 2 Mbit of Flash memory
•
A second Flash Boot memory
•
Over 3,000 gates of Flash programmable logic
•
Up to 256 Kbit SRAM
•
Reconfigurable I/O ports
•
Programmable power management.
PSD8XXF devices integrate an optimized “microcontroller macrocell” logic architecture
called the Micro⇔Cell
TM
. The Micro⇔Cell was created to address the unique requirements
of embedded system designs. It allows direct connection between the system address/data
bus and the internal PSD registers to simplify communication between the MCU and other
supporting devices.
1
FPGA/CPLD
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