PMCM6501VNE
26 August 2015
WL
CS
P6
12 V, N-channel Trench MOSFET
Product data sheet
1. General description
N-channel enhancement mode Field-Effect Transistor (FET) in a 6 bumps Wafer Level
Chip-Size Package (WLCSP) using Trench MOSFET technology.
2. Features and benefits
•
•
•
•
Low threshold voltage
Ultra small package: 0.98 × 1.48 × 0.35 mm
Trench MOSFET technology
ElectroStatic Discharge (ESD) protection > 2 kV HBM
3. Applications
•
•
•
•
Relay driver
High-speed line driver
Low-side loadswitch
Switching circuits
4. Quick reference data
Table 1.
Symbol
V
DS
V
GS
I
D
R
DSon
Quick reference data
Parameter
drain-source voltage
gate-source voltage
drain current
V
GS
= 4.5 V; T
amb
= 25 °C; t ≤ 5 s
V
GS
= 4.5 V; I
D
= 3 A; T
j
= 25 °C
[1]
Conditions
T
j
= 25 °C
Min
-
-8
-
Typ
-
-
-
Max
12
8
9.6
Unit
V
V
A
Static characteristics
drain-source on-state
resistance
[1]
2
-
15
18
mΩ
Device mounted on an FR4 Printed-Circuit Board (PCB), single-sided copper, tin-plated, mounting pad for
drain 6 cm .
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NXP Semiconductors
PMCM6501VNE
12 V, N-channel Trench MOSFET
5. Pinning information
Table 2.
Pin
A1
A2
B1
B2
C1
C2
Pinning information
Symbol Description
G
S
S
S
D
D
gate
source
source
source
drain
drain
A
B
C
Transparent top view
S
017aaa255
Simplified outline
1
2
Graphic symbol
D
G
WLCSP6 (OL-
PMCM6501VNE)
6. Ordering information
Table 3.
Ordering information
Package
Name
PMCM6501VNE
WLCSP6
Description
WLCSP6: wafer level chip-size package; 6 bumps (3 x
2)
Version
OL-PMCM6501VNE
Type number
7. Marking
Table 4.
Marking codes
Marking code
AC
Type number
PMCM6501VNE
2
PIN A1
INDICATION
MARKING CODE
(EXAMPLE)
A
B
Top view, balls down
C
aaa-013901
1
Fig. 1.
WLCSP6 marking code description
PMCM6501VNE
All information provided in this document is subject to legal disclaimers.
© NXP Semiconductors N.V. 2015. All rights reserved
Product data sheet
26 August 2015
2 / 15
NXP Semiconductors
PMCM6501VNE
12 V, N-channel Trench MOSFET
8. Limiting values
Table 5.
Limiting values
In accordance with the Absolute Maximum Rating System (IEC 60134).
Symbol
V
DS
V
GS
I
D
Parameter
drain-source voltage
gate-source voltage
drain current
V
GS
= 4.5 V; T
amb
= 25 °C; t ≤ 5 s
V
GS
= 4.5 V; T
amb
= 25 °C
V
GS
= 4.5 V; T
amb
= 100 °C
I
DM
P
tot
peak drain current
total power dissipation
T
amb
= 25 °C; single pulse; t
p
≤ 10 µs
T
amb
= 25 °C
T
sp
= 25 °C
T
j
T
amb
T
stg
I
S
junction temperature
ambient temperature
storage temperature
[2]
[1]
[1]
[1]
[1]
Conditions
T
j
= 25 °C
Min
-
-8
-
-
-
-
-
-
-
-55
-55
-65
Max
12
8
9.6
7.3
4.6
29
556
1300
Unit
V
V
A
A
A
A
mW
mW
12500 mW
150
150
150
°C
°C
°C
Source-drain diode
source current
[1]
[2]
T
amb
= 25 °C
2
[1]
-
1.2
A
Device mounted on an FR4 Printed-Circuit Board (PCB), single-sided copper, tin-plated, mounting pad for
drain 6 cm .
Device mounted on an FR4 Printed Circuit Board (PCB), single-sided copper, tin-plated and standard
footprint.
PMCM6501VNE
All information provided in this document is subject to legal disclaimers.
© NXP Semiconductors N.V. 2015. All rights reserved
Product data sheet
26 August 2015
3 / 15
NXP Semiconductors
PMCM6501VNE
12 V, N-channel Trench MOSFET
120
P
der
(%)
80
017aaa123
120
I
der
(%)
80
017aaa124
40
40
0
- 75
- 25
25
75
125
T
j
(°C)
175
0
- 75
- 25
25
75
125
T
j
(°C)
175
Fig. 2.
Normalized total power dissipation as a
function of junction temperature
Fig. 3.
Normalized continuous drain current as a
function of junction temperature
10
2
I
D
(A)
10
Limit R
DSon
= V
DS
/I
D
t
p
= 10 µs
t
p
= 100 µs
t
p
= 1 ms
1
t
p
= 10 ms
10
-1
DC; T
sp
= 25 °C
DC; T
amb
= 25 °C;
drain mounting pad 6 cm
2
10
-2
10
-1
t
p
= 100 ms
aaa-016024
1
10
V
DS
(V)
10
2
I
DM
= single pulse
Fig. 4.
Safe operating area; junction to ambient; continuous and peak drain currents as a function of drain-
source voltage
9. Thermal characteristics
Table 6.
Symbol
R
th(j-a)
Thermal characteristics
Parameter
thermal resistance
from junction to
ambient
Conditions
in free air
[1]
[2]
[3]
Min
-
-
-
-
Typ
180
65
75
45
Max
225
85
95
55
Unit
K/W
K/W
K/W
K/W
4 / 15
in free air; t ≤ 5 s
PMCM6501VNE
All information provided in this document is subject to legal disclaimers.
[3]
© NXP Semiconductors N.V. 2015. All rights reserved
Product data sheet
26 August 2015
NXP Semiconductors
PMCM6501VNE
12 V, N-channel Trench MOSFET
Symbol
R
th(j-sp)
Parameter
thermal resistance
from junction to solder
point
[1]
[2]
[3]
Conditions
Min
-
Typ
5
Max
10
Unit
K/W
Device mounted on an FR4 Printed-Circuit Board (PCB), single-sided copper, tin-plated and standard
footprint.
Device mounted on an FR4 PCB, single-sided copper, tin-plated, mounting pad for drain 6 cm .
aaa-013880
2
Device mounted on an FR4 PCB, single-sided copper, tin-plated, mounting pad for drain, 4-layer, 1 cm .
2
10
3
Z
th(j-a)
(K/W)
10
2
duty cycle = 1
0.75
0.33
0.20
0.05
0
0.02
0.01
0.50
0.25
0.10
10
1
10
-3
10
-2
10
-1
1
10
10
2
t
p
(s)
10
3
FR4 PCB, standard footprint
Fig. 5.
Transient thermal impedance from junction to ambient as a function of pulse duration; typical values
10
2
duty cycle = 1
0.75
Z
th(j-a)
(K/W)
0.50
0.33
0.20
10
0.05
0.02
0.01
0
0.25
0.10
aaa-013881
1
10
-3
10
-2
10
-1
2
1
10
10
2
t
p
(s)
10
3
FR4 PCB, mounting pad for drain 6 cm
Fig. 6.
Transient thermal impedance from junction to ambient as a function of pulse duration; typical values
PMCM6501VNE
All information provided in this document is subject to legal disclaimers.
© NXP Semiconductors N.V. 2015. All rights reserved
Product data sheet
26 August 2015
5 / 15
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