PUSB3AB6
ON
7
ESD protection for ultra high-speed interfaces
Rev. 1 — 3 March 2015
Product data sheet
1. Product profile
1.1 General description
The device is designed to protect high-speed interfaces such as SuperSpeed and
Hi-Speed USB combination, Secure Digital (SD) card 3.0 and Thunderbolt interfaces
against ElectroStatic Discharge (ESD).
The device includes six high-level ESD protection diode structures. They protect sensitive
transmitters and receivers for ultra high-speed signal lines. The device is encapsulated in
a leadless ultra small DFN2111-7 (SOT1358-1) Surface-Mounted Device (SMD) plastic
package.
All signal lines are protected by a special diode configuration offering snapback ultra low
line capacitance of only 0.15 pF. These diodes utilize a snapback structure in order to
provide protection to downstream components from ESD voltages up to
15
kV contact
exceeding IEC 61000-4-2, level 4.
XS
1.2 Features and benefits
System-level ESD protection for USB 2.0 and USB 3.1 combination, SD card 3.0 and
Thunderbolt interfaces
Supports SuperSpeed USB 3.1 at 10 Gbps
Line capacitance of only 0.15 pF for each channel
All signal lines with integrated rail-to-rail clamping diodes for downstream
ESD protection of
15
kV exceeding IEC 61000-4-2, level 4
Matched 0.5 mm trace spacing
Design-friendly pass-through signal routing
1.3 Applications
The device is designed for high-speed receiver and transmitter port protection:
Portable and wearable devices
Smartphones, tablet computers
TVs and monitors
DVD recorders and players
Notebooks, main board graphic cards and ports
Set-top boxes and game consoles
NXP Semiconductors
PUSB3AB6
ESD protection for ultra high-speed interfaces
2. Pinning information
Table 1.
Pin
1
2
3
4
5
6
7
CH1
GND
CH2
CH3
CH4
CH5
CH6
Pinning
Description
channel 1 ESD protection
ground
channel 2 ESD protection
channel 3 ESD protection
channel 4 ESD protection
channel 5 ESD protection
channel 6 ESD protection
4
3
5
=
2
6
[1]
Symbol
Simplified outline
Graphic symbol
1
3
4
5
6
7
1
7
2
Transparent top view
aaa-016888
[1]
Any pin can be chosen for ground connection; one pin must be connected to ground.
3. Ordering information
Table 2.
Ordering information
Package
Name
PUSB3AB6
DFN2111-7
Description
Version
plastic extremely thin small outline package;
SOT1358-1
no leads; 7 terminals; body 1.1
2.1
0.5 mm
Type number
4. Marking
Table 3.
Marking codes
Marking code
AB
Type number
PUSB3AB6
PUSB3AB6
All information provided in this document is subject to legal disclaimers.
© NXP Semiconductors N.V. 2015. All rights reserved.
Product data sheet
Rev. 1 — 3 March 2015
2 of 12
NXP Semiconductors
PUSB3AB6
ESD protection for ultra high-speed interfaces
5. Limiting values
Table 4.
Limiting values
In accordance with the Absolute Maximum Rating System (IEC 60134).
Symbol
V
I
V
ESD
Parameter
input voltage
electrostatic discharge
voltage
IEC 61000-4-2, level 4
contact discharge
air discharge
I
PPM
T
amb
T
stg
[1]
[1]
Conditions
Min
3.3
15
15
7
40
55
Max
+3.3
+15
+15
+7
+85
+125
Unit
V
kV
kV
A
C
C
rated peak pulse current
ambient temperature
storage temperature
t
p
= 8/20
s
All pins to ground.
6. Characteristics
Table 5.
Characteristics
T
amb
= 25
C unless otherwise specified.
Symbol
V
BR
I
LR
C
line
r
dyn
Parameter
breakdown voltage
line capacitance
dynamic resistance
Conditions
I
I
= 1 mA
f = 1 MHz; V
I
= 1.5 V
TLP
positive transient
negative transient
V
sbck
V
CL
snapback voltage
clamping voltage
I
I
= 1 A TLP; 100/10 ns
I
PP
= 5 A; positive transient
I
PP
=
5
A;
negative transient
[1]
[2]
[3]
This parameter is guaranteed by design.
According to IEC 61000-4-5 (pulse time t
p
=
8/20
s).
100 ns Transmission Line Pulse (TLP); 50
;
pulser at 80 ns.
[2]
[2]
[1]
[3]
Min
6
-
-
-
-
-
-
-
Typ
-
1
0.15
0.4
0.4
3
6
6
Max
-
100
0.20
-
-
-
-
-
Unit
V
nA
pF
V
V
V
reverse leakage current per channel; V
I
= 5 V
PUSB3AB6
All information provided in this document is subject to legal disclaimers.
© NXP Semiconductors N.V. 2015. All rights reserved.
Product data sheet
Rev. 1 — 3 March 2015
3 of 12
NXP Semiconductors
PUSB3AB6
ESD protection for ultra high-speed interfaces
5
S
21
(dB)
0
aaa-016897
1.2
a
aaa-016898
0.8
-5
-10
0.4
-15
-20
10
7
10
8
10
9
f (Hz)
10
10
0
0
1
2
3
4
V
I
(V)
5
differential mode
C
line
a
=
---------------------------------
C
line
V
=
0
V
I
Fig 1.
Insertion loss; typical values
Fig 2.
Relative capacitance as a function of input
voltage; typical values
aaa-016899
-10
S
dd21
(dB)
-30
-50
-70
10
5
10
6
10
7
10
8
10
9
f (Hz)
10
10
Sdd21 normalized to 100
Fig 3.
Crosstalk; typical values
PUSB3AB6
All information provided in this document is subject to legal disclaimers.
© NXP Semiconductors N.V. 2015. All rights reserved.
Product data sheet
Rev. 1 — 3 March 2015
4 of 12
NXP Semiconductors
PUSB3AB6
ESD protection for ultra high-speed interfaces
aaa-016900
Data rate: 10 Gbit/s
Vertical scale: 325 mV/div
Horizontal scale: 16.7 ps/div
Fig 4.
USB 3.1 eye diagram, Printed-Circuit Board (PCB) with PUSB3AB6
aaa-016901
Data rate: 10 Gbit/s
Vertical scale: 325 mV/div
Horizontal scale: 16.7 ps/div
Fig 5.
USB 3.1 eye diagram, PCB without PUSB3AB6 (reference)
PUSB3AB6
All information provided in this document is subject to legal disclaimers.
© NXP Semiconductors N.V. 2015. All rights reserved.
Product data sheet
Rev. 1 — 3 March 2015
5 of 12
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