ZMD44102 datasheet, PDF - EEWORLD Datasheet

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ZMD44102: DescriptionRF and Baseband Circuit, CMOS, PQCC48; CategoryWireless rf/communication Telecom circuit; File Size5MB，124 Pages; ManufacturerIDT (Integrated Device Technology)

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ZMD44102 Overview

RF and Baseband Circuit, CMOS, PQCC48

ZMD44102 Parametric

Parameter Name	Attribute value
Maker	IDT (Integrated Device Technology)
package instruction	VQCCN,
Reach Compliance Code	compliant
JESD-30 code	S-PQCC-N48
length	7 mm
Number of functions	1
Number of terminals	48
Maximum operating temperature	85 °C
Minimum operating temperature	-40 °C
Package body material	PLASTIC/EPOXY
encapsulated code	VQCCN
Package shape	SQUARE
Package form	CHIP CARRIER, VERY THIN PROFILE
Certification status	Not Qualified
Maximum seat height	0.9 mm
Nominal supply voltage	2.4 V
surface mount	YES
technology	CMOS
Telecom integrated circuit types	RF AND BASEBAND CIRCUIT
Temperature level	INDUSTRIAL
Terminal form	NO LEAD
Terminal pitch	0.5 mm
Terminal location	QUAD
width	7 mm

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ZMD44102

Data Sheet and User Manual

Version: 1.1

Release Date: 28 Aug 2006

ZMD44102 Data Sheet and User Manual v.1.1 - August 28, 2006

written consent of the copyright owner. The information furnished in this publication is preliminary and subject to changes without notice.

ZMD44102

Table of Contents

General Device Description .......................................................................................................... 6

1.1 Introduction ............................................................................................................................ 6

1.2 Features................................................................................................................................. 6

1.3 RF Frontend Description........................................................................................................ 7

1.4 Pin Assignment...................................................................................................................... 8

1.5 Pin Description....................................................................................................................... 8

1.6 System Performance Summary........................................................................................... 10

Device Specification .................................................................................................................... 11

2.1 Recommended Operating Conditions ................................................................................. 11

2.2 Absolute Maximum Ratings................................................................................................. 11

2.3 Digital I/O ............................................................................................................................. 11

2.4 Operation Modes and Current Consumption....................................................................... 12

2.5 Startup Time ........................................................................................................................ 12

2.6 RF Parameter Summary...................................................................................................... 13

Application Circuit and External Components ......................................................................... 14

3.1 Crystal Oscillator.................................................................................................................. 15

3.1.1 Reference Crystal Oscillator (24 MHz).................................................................... 15

3.1.2 Low Power Crystal Oscillator (32.768 kHz) ............................................................ 15

3.2 RF Phase Locked Loop ....................................................................................................... 16

3.3 Antenna Connection and Power Amplifier Configuration .................................................... 17

3.4 Clock Output (CLKO)........................................................................................................... 17

3.5 Interfacing ............................................................................................................................ 18

3.5.1 Power Up................................................................................................................. 19

3.5.2 Reset (RSN) ............................................................................................................ 19

3.6 Synchronous Serial Peripheral Interface (SPI).................................................................... 20

3.7 Parallel Interface.................................................................................................................. 22

Integrated HW-MAC ..................................................................................................................... 23

4.1 Overview.............................................................................................................................. 23

4.2 Block Diagram ..................................................................................................................... 24

4.3 MAC Control ........................................................................................................................ 24

4.4 Interrupts.............................................................................................................................. 25

4.5 Frame Handling ................................................................................................................... 26

4.6 Link Quality Indicator (LQI) .................................................................................................. 28

4.7 Receive Signal Strength Indicator (RSSI) ........................................................................... 29

4.8 Energy Detection Level........................................................................................................ 30

4.9 Frame Filtering..................................................................................................................... 31

4.10 Operation Mode Overview ................................................................................................... 32

4.11 Operation Mode Description................................................................................................ 36

4.11.1 Low Power Modes................................................................................................... 37

4.11.2 Transmit Mode (Tx) ................................................................................................. 39

4.11.3 Receive Mode (Rx).................................................................................................. 44

4.11.4 Scan Modes ............................................................................................................ 47

Page 4 of 124

ZMD44102

4.11.5 Automatic Beacon Generation ................................................................................ 49

4.11.6 Beacon Tracking ..................................................................................................... 52

4.11.7 Superframe Configuration ....................................................................................... 55

4.12 Timing Correction ................................................................................................................ 56

4.12.1 Network Timing Correction...................................................................................... 56

4.12.2 Beacon Interval Timing Correction.......................................................................... 56

4.12.3 Superframe Timing Correction ................................................................................ 58

4.13 General Purpose Timer Function ........................................................................................ 59

4.13.1 Overview ................................................................................................................. 59

4.13.2 General Purpose Interrupt....................................................................................... 60

4.13.3 Timer Controlled MAC Control Command Execution ............................................. 60

4.13.4 Receive and Transmit Timestamp .......................................................................... 60

4.14 Message Sequence Charts (MSCs) .................................................................................... 61

Registers....................................................................................................................................... 71

5.1 Register Summary ............................................................................................................... 71

5.2 IRQ Control, Configuration and Status ................................................................................ 75

5.3 PHY Register ....................................................................................................................... 78

5.4 MAC Operating Control ....................................................................................................... 81

5.5 MAC FIFO Register ............................................................................................................. 83

5.6 MAC Tx Control ................................................................................................................... 85

5.7 MAC Rx Control................................................................................................................... 91

5.8 MAC Ack Control ................................................................................................................. 94

5.9 MAC Scan Control ............................................................................................................... 97

5.10 MAC Beacon Control ........................................................................................................... 99

5.10.1 MAC Beacon Generation Control............................................................................ 99

5.10.2 MAC Beacon Tracking Control.............................................................................. 101

5.11 MAC Timer Control and Values......................................................................................... 106

5.12 MAC Frame Filter Control.................................................................................................. 109

5.13 MAC Superframe and GTS Control................................................................................... 111

5.14 MAC CSMA Control........................................................................................................... 114

5.15 SPI Registers..................................................................................................................... 116

5.16 CLKO Configuration........................................................................................................... 118

5.17 Recommended Startup Register Setup............................................................................. 119

Transmitter RF Spectrum Test Modes..................................................................................... 120

Mechanical Specifications ........................................................................................................ 121

Limitations .................................................................................................................................. 122

Document Revision History ...................................................................................................... 122

List of Abbreviations ................................................................................................................. 123

References.................................................................................................................................. 123

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