IS61VF51236-7.5B3I datasheet, PDF

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IS61VF51236-7.5B3I: DescriptionCache SRAM, 512KX36, 7.5ns, CMOS, PBGA165, 13 X 15 MM, 1 MM PITCH, PLASTIC, BGA-165; Categorystorage storage; File Size163KB，29 Pages; ManufacturerIntegrated Silicon Solution ( ISSI )

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IS61VF51236-7.5B3I Overview

Cache SRAM, 512KX36, 7.5ns, CMOS, PBGA165, 13 X 15 MM, 1 MM PITCH, PLASTIC, BGA-165

IS61VF51236-7.5B3I Parametric

Parameter Name	Attribute value
Is it lead-free?	Contains lead
Is it Rohs certified?	incompatible
Maker	Integrated Silicon Solution ( ISSI )
Parts packaging code	BGA
package instruction	BGA,
Contacts	165
Reach Compliance Code	compliant
ECCN code	3A991.B.2.A
Maximum access time	7.5 ns
Other features	FLOW-THROUGH ARCHITECTURE
JESD-30 code	R-PBGA-B165
JESD-609 code	e0
memory density	18874368 bit
Memory IC Type	CACHE SRAM
memory width	36
Number of functions	1
Number of terminals	165
word count	524288 words
character code	512000
Operating mode	SYNCHRONOUS
Maximum operating temperature	85 °C
Minimum operating temperature	-40 °C
organize	512KX36
Package body material	PLASTIC/EPOXY
encapsulated code	BGA
Package shape	RECTANGULAR
Package form	GRID ARRAY
Parallel/Serial	PARALLEL
Peak Reflow Temperature (Celsius)	NOT SPECIFIED
Certification status	Not Qualified
Maximum supply voltage (Vsup)	2.625 V
Minimum supply voltage (Vsup)	2.375 V
Nominal supply voltage (Vsup)	2.5 V
surface mount	YES
technology	CMOS
Temperature level	INDUSTRIAL
Terminal surface	TIN LEAD
Terminal form	BALL
Terminal location	BOTTOM
Maximum time at peak reflow temperature	NOT SPECIFIED

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IS61VF51236A IS61VF102418A

IS61LF51236A IS61LF102418A

512K x 36, 1024K x 18

18M SYNCHRONOUS FLOW-THROUGH

STATIC RAM

ISSI

ADVANCE INFORMATION

DECEMBER 2002

FEATURES

• Internal self-timed write cycle

• Individual Byte Write Control and Global Write

• Clock controlled, registered address, data and

control

• Burst sequence control using MODE input

• Three chip enable option for simple depth expan-

sion and address pipelining

• Common data inputs and data outputs

• Auto Power-down during deselect

• Single cycle deselect

• Snooze MODE for reduced-power standby

• JTAG Boundary Scan for PBGA package

• Power Supply

LF: V

3.3V + 5%, V

DDQ

3.3V/2.5V + 5%

VF: V

2.5V + 5%, V

DDQ

2.5V + 5%

• JEDEC 100-Pin TQFP, 119-pin PBGA, and

165-pin PBGA package.

DESCRIPTION

The

ISSI

IS61LF/VF51236A and IS61LF/VF102418A are

high-speed, low-power synchronous static RAMs designed

to provide burstable, high-performance memory for commu-

nication and networking applications. The IS61LF/

VF51236A is organized as 524,288 words by 36 bits and

the IS61LF/VF102418A is organized as 1,048,576 words

by 18 bits. Fabricated with

ISSI

's advanced CMOS tech-

nology, the device integrates a 2-bit burst counter, high-

speed SRAM core, and high-drive capability outputs into

a single monolithic circuit. All synchronous inputs pass

through registers controlled by a positive-edge-triggered

single clock input.

Write cycles are internally self-timed and are initiated by

the rising edge of the clock input. Write cycles can be one

to four bytes wide as controlled by the write control inputs.

Separate byte enables allow individual bytes to be written.

Byte write operation is performed by using byte write

enable (BWE) input combined with one or more individual

byte write signals (BWx). In addition, Global Write (GW) is

available for writing all bytes at one time, regardless of the

byte write controls.

Bursts can be initiated with either

ADSP

(Address Status

Processor) or

ADSC

(Address Status Cache Controller)

input pins. Subsequent burst addresses can be generated

internally and controlled by the

ADV

(burst address ad-

vance) input pin.

The mode pin is used to select the burst sequence order,

Linear burst is achieved when this pin is tied LOW.

Interleave burst is achieved when this pin is tied HIGH or

left floating.

FAST ACCESS TIME

Symbol

Parameter

Clock Access Time

Cycle Time

Frequency

-6.5

6.5

7.5

133

-7.5

7.5

8.5

117

Units

MHz

without notice. ISSI assumes no liability arising out of the application or use of any information, products or services described herein. Customers are advised to

obtain the latest version of this device specification before relying on any published information and before placing orders for products.

Integrated Silicon Solution, Inc. — 1-800-379-4774

ADVANCE INFORMATION

12/10/02

Rev. 00A

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