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SM532023091X4G6

Description
EDO DRAM Module, 2MX32, 60ns, CMOS, SIMM-72
Categorystorage    storage   
File Size179KB,24 Pages
ManufacturerSMART Modular Technology Inc
Download Datasheet Parametric View All

SM532023091X4G6 Overview

EDO DRAM Module, 2MX32, 60ns, CMOS, SIMM-72

SM532023091X4G6 Parametric

Parameter NameAttribute value
MakerSMART Modular Technology Inc
Parts packaging codeSIMM
package instructionSIMM-72
Contacts72
Reach Compliance Codeunknown
ECCN codeEAR99
access modeFAST PAGE WITH EDO
Maximum access time60 ns
Other featuresCAS BEFORE RAS/RAS ONLY/HIDDEN REFRESH
JESD-30 codeR-XSMA-N72
memory density67108864 bit
Memory IC TypeEDO DRAM MODULE
memory width32
Number of functions1
Number of ports1
Number of terminals72
word count2097152 words
character code2000000
Operating modeASYNCHRONOUS
Maximum operating temperature70 °C
Minimum operating temperature
organize2MX32
Package body materialUNSPECIFIED
Package shapeRECTANGULAR
Package formMICROELECTRONIC ASSEMBLY
Certification statusNot Qualified
Maximum supply voltage (Vsup)3.6 V
Minimum supply voltage (Vsup)3 V
Nominal supply voltage (Vsup)3.3 V
surface mountNO
technologyCMOS
Temperature levelCOMMERCIAL
Terminal formNO LEAD
Terminal locationSINGLE
SMART
Features
®
SM5320230UUXUUU
November 19, 1996
Modular Technologies
8MByte (2M x 32) DRAM Module - 1Mx16 based
72-pin SIMM
Part Numbers
SM53202300UXUUU
SM53202301UXUUU
SM53202308UXUUU
SM53202309UXUUU
Standard
:
JEDEC (5.0V FPM only)
Configuration
:
Non-parity
Access Time
:
60/70/80ns
Operation Mode
:
FPM/EDO
Operating Voltage :
3.3/5.0V
Refresh
:
1K/4K
Device Physicals
:
400mil SOJ/TSOP
Lead Finish
:
Gold/Solder
Length x Height
:
4.250" x 0.850"(SOJ)/1.000”(TSOP)
No. of sides
:
Double-sided
Mating Connector (Examples)
Horizontal
:
AMP-7-382486-2 (Tin) / 7-382487-2 (Gold)
Vertical
:
AMP-822019-4 (Tin) / 822031-4 (Gold)
Angled
:
AMP-822110-3 (Tin) / 822097-3 (Gold)
:
:
:
:
FPM, 5.0V
FPM, 3.3V
EDO, 5.0V
EDO, 3.3V
Note: Refer last page for all "U” options.
Related Products
SM5320240U1X3UU
:
2Mx32,
1Mx4 based.
Functional Diagram
RAS0#
CAS0#
CAS1#
1Mx16
DRAM
1Mx16
DRAM
RAS2#
CAS2#
CAS3#
1Mx16
DRAM
RAS1#
DQ0~DQ15
1Mx16
DRAM
RAS3#
DQ16~DQ31
DQ0~DQ31
Notes : 1. A0~A11 to all DRAMs (A10 & A11 are NC for 1K refresh module).
2. WE# to all DRAMs.
3. OE# of all DRAMs is grounded.
V
CC
V
SS
Decoupling capacitors
to all devices.
( All specifications of this device are subject to change without notice.)
C
orporate Headquarters:
4305 Cushing Pkwy., Fremont, CA 94538, USA • Tel:(510) 623-1231 • Fax:(510) 623-1434 • E-mail: info@smartm.com
Europe:
36 Linford Forum, Rockingham Dr., Linford Wood, Milton Keynes, MK14 6LY, UK • Tel: + 44-1908 234030 • Fax: + 44-1908-234191
Asia/Pacific:
Suite 6A, 64 Canning Hwy., Victoria Park, Perth, WA 6106, Australia • Tel: + 61-9-361-9705 • Fax: + 61-9-361-9715
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